搜索资源列表
SRAM@DMA实验
- ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，然后NIOS SHELL下C 语言运行。实验SRAM和DMA调度-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, then NIOS SHELL C language runtime. Experimental SRAM and DMA Scheduling
1024_FFT
- 1024点FFT快速傅立叶变换，包含说明文档和VHDL源代码，16位输入/输出，带DMA功能，xilinx的ip-1024-point FFT fast Fourier transform, and includes documentation, VHDL source code, 16 input / output, with DMA function, the ip xilinx
VHDL-XILINX-EXAMPLE26
- [VHDL经典设计26例]--在xilinx芯片上调试通过--[01--1位全加器][02--2选1多路选择器][03--8位硬件加法器][04--7段数码显示译码器][05--8位串入并出寄存器][6--8位并入串出寄存器][7--内部三态总线][8--含清零和同步时钟使能的4位加法计数器][9--数控分频器][10--4位十进制频率计][11--译码扫描显示电路][12--用状态机实现序列检测器的设计][13--用状态机对ADC0832电路控制实现SIN函数发生器][14--用状态机实现AD
DMA
- 针对QUARTUS的DMA的VHDL代码实现-DMA Controller Code in VHDL
dma_ahb_latest.tar
- this shows the ip code for dma controller of amba ahb in vhdl.
datapath_fifo
- datapath_fifo used in DMA contect PCI in the DAB system the format of this file is VHDL
DMA_Freeware
- 基于xilinx vierex5得pci express dma设计实现。-Based on a xilinx vierex5 realize pci express dma design.
DMA_8237A
- 经典DMA控制器8237A的VHDL设计，对设计DMA控制器有很高的参考价值。-Classic DMA controller 8237A of the VHDL design, the design of the DMA controller has a high reference value.
CPU_Architecture
- Our processor is a RISC processor that can be used for many general applications, but it is specially designed for the purpose of high speed network related tasks. External hardware accelerator is used for network packet processing. The common netw
AlteraDMAdetector
- altera DMA代码控制器，开发环境为QUARTUS-altera DMA controller code, development environment for QUARTUS
dma_hussam
- verilog code for dma
source
- A basic DMA Controller source code
xie
- 通过IDE接口实现硬盘扇区的写操作，DMA方式的源代码-write operation to hard disk sector through the IDE interface , DMA mode of the source code
du
- 通过IDE接口实现硬盘扇区的写操作，DMA方式的源代码-write operation to hard disk sector through the IDE interface , DMA mode of the source code
Xilinx_PCIE_DMA
- Xilinx芯片所有关于PCI Express接口的DMA源代码，包含相关的配套的文档资料。-Xilinx chip on the PCI Express interface for all DMA source code, including relevant supporting documentation.
DMA
- VHDL code of DMA controller
DMA
- DMA controller VHDL code entity dma is generic ( ADDR_WIDTH : integer := 16 -- default value DATA_WIDTH : integer := 16 -- default value ) port ( RESET_L : in std_logic CLK : in std_logic DRQ_L : in std_logic DMAA
Intel 8237A DMA Controller
- 经典DMA控制器8237A的VHDL设计，对设计DMA控制器有很高的参考价值。-Classic DMA controller 8237A of the VHDL design, the design of the DMA controller has a high reference value.
microzed-axi-dma
- microzed (zynq) axi dma source vhdl
BCH
- BCH coder and decoder. Uses special DMA connection