搜索资源列表
decoder(vhdl)
- 这是用VHDL编写的译码程序,程序简单易懂-VHDL prepared decoding procedures that are simple to understand
026030065王银涛VHDL
- 7段数码显示译码器-seven of the digital display decoder
hdb3 decoder
- 我上期做的VHDL设计方案，用于在FPGA或CPLD中实现HDB3的编码-I do view on the VHDL design options for the CPLD or FPGA to achieve HDB3 code
Viterbi_IP.rar
- viterbi译码器的IP核，可以直接编译使用,viterbi decoder IP core, the compiler can directly use
RSdecoder.rar
- cpld/fpga RS(204,188)译码器的verilog程序,cpld/fpga RS (204,188) decoder of the Verilog program
06-50.zip
- PAL decoder, spartan 3 FPGA,PAL decoder, spartan 3 FPGA
tpc_vhd.rar
- 完整的TPC编译码VHDL程序，直接就可以运行,TPC encoder and decoder
BCHencodeanddecode
- bch 编码和译码，用硬件语言vhdl实现-bch edcode and decoder
SAA7113forVideo
- FPGA控制SAA7113实现视频解码。SAA7113是高集成度视频解码芯片。-FPGA Control SAA7113 video decoder implementation. SAA7113 is a highly integrated video decoder chip.
VHDL38decoder
- VHDL 语言实现 38译码器 文件中包括 程序 源代码 还有 testbench 测试程序-38 decoder VHDL language implementation, including program source code file, there are testbench test procedures
mp3decoder
- verilog实现mp3解码程序，包括testbench-mp3 decoder verilog implementation procedures, including the testbench
VHDL
- 7段数码管译码器和8421码十进制计数器的程序-7 segment digital tube, and 8421 yards decimal decoder program counter
decoder
- 指令译码器的设计vhdl语言或者verilog HDL语言对单片机程序的处理-Instruction decoder design vhdl language or verilog HDL language processing microcomputer programs
dec.vhd
- vhdl code for a 16 bit decoder design
Seven-Segment-Decoder
- 用VHDL语言在FPGA上实现将十进制bcd码转换成七段led显示码-FPGA using VHDL language to achieve will be converted to decimal bcd yards led seven segment display code
2-Decimal-BCD-Decoder
- 二-十进制BCD译码器，就是用VDHL编写的将二进制转化为十进制的BCD译码器-2- Decimal BCD Decoder, is to use VDHL written into the binary decimal BCD decoder
decoder
- VHDL decoder. For converting binary to seven segment,
VD-vhdl-Code
- this codes are for convolution encoder and Viterbi decoder synthesis and implementation.
ldpc-decoder
- LDPC Encoding Code Tetourial VHDL
3-8译码器VHDL描述
- 在开发板FPGA：Spartan-3E 系列，型号：XC3S500E，封装：FGT320，速度-4；利用XIlinX编程，使用VHDL语言来描述组合逻辑器件3-8译码器(In the FPGA:Spartan-3E development board series, XC3S500E, FGT320, -4 package: speed; the use of XIlinX programming, using VHDL language to describe the combination