搜索资源列表
MUX4_1_2bits_fonction
- this project about multiplexer four to one compiled and implanted in cart fpga xilinx 3E, with file .bit
m_counter
- this project about compteur m bit compiled and implanted in cart fpga xilinx 3E, with file .HDL and .bit
Tetris_Zedboard
- 俄罗斯方块 ”FPGA实现本项目主要在FPGA上实现了一个经典小游戏“俄罗斯方块”。本项目基本解决方案是，使用Xilinx Zynq系列开发板ZedBoard作为平台，实现主控模块，通过VGA接口来控制屏幕进行显示。-New Tetris
ug195
- 这个文档是关于xilinx virtex-5 FPGA板的封装和管脚定义文件，对于使用v5 有很大的帮助-This document is package and pin definitions files about xilinx virtex-5 FPGA board for use v5 great help
uartsample
- Xilinx EDK开发 通过FPGA实现UART通信-EDK Xilinx development through FPGA to achieve UART communication
Sparten6-CODE-_Verilog
- 基于xilinx 厂商的FPGA硬件的开发源代码，包括UART,SPI,以太网通信-The development of FPGA hardware based on xilinx manufacturers source code, including the UART, SPI, Ethernet communication and so on
viterbi_soft
- 维特比译码器，调用IP核，软判决输入，开发平台Xilinx Spartan-6系列FPGA-viterbi decoder, using IP core resource, soft decision input,develop platform is Xilinx Spartan-6 series FPGA
wiznet5500_Verilog
- 使用Xilinx Spartan-6 XC6SLX9的FPGA驱动Wiznet5500网卡芯片的Verilog设计，可以发送和接收，已经测试，无误。-Using the Xilinx Spartan-6 XC6SLX9 FPGA driver The Wiznet5500 network card chip Verilog design can be sent and received, has been tested, and is correct.
Implement-a-CPU
- 在FPGA赛灵思基础3上使用Verilog HDL实现支持MIPS操作子集的CPU-Implement a CPU which supports a subset of MIPS operations using Verilog HDL on FPGA Xilinx Basys 3
UART-HPY
- 利用FPGA实现了UART编解码功能，已在Xilinx及Altera多种型号FPGA例化使用。附有寄存器使用说明。(a useful UART decoder and encoder.)
Verilog HDL program
- 文件详细讲述了使用XILINX产FPGA在ISE平台开发的方法，介绍了Modelsim，chipscope,textbench等仿真方法，并含大量实例以及源代码(File details on the use of XILINX produced FPGA in the ISE platform development methods, introduced the Modelsim, chipscope, textbench and other simulation methods, and
VGA
- vga code for fpga 3s500e spartan xilinx code verilog tutorial video graphics array in verilog interfacing with fpga xilins spattan 3e very easy to learn
mig_7series_0_ex
- 嵌入式 单片机编程 内存控制器 赛灵思 使用教程(fpga mig xilinx Embedded microcontroller programming memory controller Xilinx tutorial)
Xilinx新一代FPGA设计套件Vivado配套资料
- verilog经典教程，入门者的必选书籍，非常实用，可以学习到很多的知识(verilog classic tutorial, entry must be books, very practical, you can learn a lot of knowledge)
pg007_srio_gen2
- FPGA手册，xilinx 的srio官方手册，仔细阅读(FPGA manual, Xilinx sRIO official manual, read carefully)
mys-xc7z020-trd
- Zturn Board verilog source. Headless.
mys-xc7z020-lcd-xylon
- Zturn board verilog source with LCD driver.
mys-xc7z020-arm-hdmi-xylon
- Zturn board verilog source with HDMI driver.
gpio_axi
- Zturn board - GPIO - AXI
10_rom_test
- 讲解赛灵思Spartant_6系列FPGA的ROM IP核的调试过程，供大家参考学习(Explain Xilinx Spartant_6 Series FPGA ROM IP core debugging process, for your reference learning)