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Describe: This VHDL digital clock, the use of digital control and FPGA design to achieve a number of counter clock, show hours, minutes ,seconds and alarm. The procedure depends on the metric system and consider six decimal counter preparation. The e
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多功能数字钟Verilog HDL的源码，能够整点报时，报整点数，设定任意时刻闹钟，低音高音两种频率。-Multi-function digital clock Verilog HDL source code, set the alarm clock at any time, bass treble two frequencies. It s for FPGA.
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本文件为电子设计而开发的多功能数字钟VHDL语言完整源代码
--该数字钟实现的功能有时间，秒表，闹钟，年月日的显示设置等
-This document is multi-functional electronic design and development of a complete VHDL, digital clock source code- the digital clock function can be achieved time, stopwatch, alarm clo
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VHDL的电子闹钟源码。适合初学者，因为我也是初学者。囧-VHDL source code of electronic alarm clock. For beginners, because I am also beginner.囧
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闹钟设计，VHDL，源代码。 -Alarm clock design, VHDL, the source code.
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51 单片机 电子钟 走时 闹钟 整点报时等功能 源代码-51 single-chip electronic alarm clock to go when the whole point timekeeping functions source code
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多功能数字钟：包含默认模式、设置模式、闹钟模式和跑表模式。已在ISE10.1工具烧录成功，烧录开发板Xilinx Spartan 3 xc3s400 pq205 speed -4 开发板烧录成功-Multi-function digital clock: contains the default mode, setting mode, alarm mode and stopwatch mode. The source code has been successfully burned in IS
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利用vhdl和verilog两种方式可以实现的fpga芯片的数字钟，其中包含多个可设计改动的个性化模块。源代码利用quartusii平台写作，可移植性很强。-Using vhdl and verilog fpga can be achieved in two ways-chip digital clock, which includes several design changes personality module. Source code using the platform quartu
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一个能在电路板上实现时钟显示功能、计数功能、闹钟功能的VHDL源码-One can achieve on the circuit board clock display, counting function, alarm clock function VHDL source code
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