搜索资源列表
ARM_register
- ARM寄存器组设计的源代码，使用Verilog编程实现，可以编译仿真通过。-将中文译成英语 ARM register set design source code, the use of Verilog programming, you can compile the simulation pass.
vhdl-arm-core
- 用vhdl语言实现arm内核，压缩包中有19个代码共同组成这个arm内核，程序比较大，应用时要注意那个代码是顶层实体。用quartus2软件即可打开仿真。-Vhdl language used arm core, compressed package code of 19 common core component of this arm, procedures, and application code should be noted that top-level entity. Used t
ARM7
- 用verilog编写的ARM7内核代码，通过modelsim仿真-With verilog code written in ARM7 core, through the modelsim simulation
cpld_I2C
- CPLD+ARM的I2C通信，cpld上的I2C接收程序,内含仿真测试程序-I2C slave for cpld and ARM
registerarm_091220004cx
- 32位arm寄存器的工程文件，包括代码及仿真-32-bit arm registers the project file, including code and simulation
ARMCORE
- arm7的内核，包括arm ip代码和仿真结果-ARM7 core,include arm code and simulation result
16-16LED
- 51单片机16×16LED点阵屏仿电梯数字滚动显示仿真与代码！-51 single-chip 16 × 16LED dot matrix screen imitation of the elevator digital scroll shows the simulation and code!
v8_ID-12345678
- JLINK v8固件arm仿真器程序，直接烧写就可以-JLINK v8
arm
- ARM内核的源代码描述，通过的各种仿真器的仿真，是学习嵌入式的好的列子，可以实现各种基本设计-ARM core
spi_no_cs_13
- FPGA作为从机与STM32的全双工通信，FPGA将接收到STM32的数据返回到STM32，Modelsim仿真和板子仿真都通过(Use FPGA as slave,realize the communication between FPGA and STM32. The function has been tested is no problem.)