搜索资源列表
ask
- 设计的一个ask调制器与解调,输入时钟clk,输入开始信号start,输入基带数据信号din及输出已调信号ask-Designed to ask a modulator and demodulator, the input clock clk, enter a start signal start, enter the baseband data signal din and the output modulated signal ask
hdb
- 数字基带信号的传输是数字通信系统的重要组成部分。在数字通信中,有些场合可不经过载波调制和解调过程,而对基带信号进行直接传输。采用AMI码的信号交替反转,有可能出现四连零现象,这不利于接收端的定时信号提取。而HDB3码因其无直流成份、低频成份少和连0个数最多不超过三个等特点,而对定时信号的恢复十分有利,并已成为CCITT协会推荐使用的基带传输码型之一。为此,本文利用VHDL语言对数据传输系统中的HDB3编码器进行了设计。 基于达到达到达到的信号发生器的源程序-Digital baseband
ASK-VHDL
- 基于VHDL硬件描述语言,对基带信号进行ASK振幅调制-VHDL hardware descr iption language based on the ASK baseband amplitude modulation signal
ip_digifrec
- The Digital IF Receiver megafunction combines a quadrature NCO and a digital mixer to translate the input IF signal down to baseband
HDB3
- 采用FPGA产生数字基带系统传输码型HDB3码,采用《通信原理》例子设计。-Generated by FPGA digital baseband transmission code HDB3 code system, a " communication theory" example design.
Baseband_line_code
- 基于VHDL语言的基带线路码产生电路设计(毕业论文),内涵完整的源代码-Based on VHDL language baseband line code generation circuit design (Thesis), meaning the complete source code
DM9000Ayuanli
- DM9000A原理及其与基带信号处理平台的结合应用-DM9000A principle and baseband signal processing platform with a combination of application
AD9857_b
- 芯片AD9857资料,英文版,此芯片可以实现基带处理,成型滤波,上变频等功能,希望对大家有用 好好看哦-Chip AD9857 information, in English, this chip can achieve baseband shaping filter, the frequency and other functions, we hope to be useful well Kane
baseband_code
- 利用VHDL硬件语言编写了常用的基带码的产生,Quartus ii 仿真通过。-Written by VHDL hardware language code commonly used in the generation of baseband, Quartus ii simulation pass.
Digital-filter-design
- 数字成形滤波器设计及FPGA实现 本文对数字基带信号脉冲成型滤波的应用、原理及实现进行了研究。-Digital filter design and FPGA realization of forming this paper, the digital baseband signal pulse shaping filter applications, principle and implementation were studied.
ofdm_sch
- 实现OFDM基带传输系统的基本功能,可运行,仿真有效。-OFDM baseband transmission system to achieve the basic function, operation, simulation effective.
asic_study
- 压缩包中是ASCI学习资料,包括一个台湾中山大学ASIC实验室综合脚本教程,一本springer出版的交大家用system verilog做验证的书,还有一个xilinx论证的XAPP726 - 无线基站基带处理应用中的FPGA的理由。对大家做通信后端设计很有帮助。-ASCI is compressed package learning materials, including a laboratory in Taiwan Sun Yat-ASIC synthesis scr ipts tuto
ASK
- 基于VHDL硬件描述语言,对基带信号进行ASK振幅调制-VHDL hardware descr iption language based on the ASK baseband amplitude modulation signal
FSK
- 基于VHDL硬件描述语言,对基带信号进行FSK调制-VHDL hardware descr iption language based on FSK modulation baseband signal
PSK
- 基于VHDL硬件描述语言,对基带信号进行调制-VHDL hardware descr iption language based on the baseband signal modulation
sheji
- 基带信号发生器,能产生正弦波,ASK,PSK,FSK信号-Baseband signal generator, can produce sine, ASK, PSK, FSK signal
8.13-MFSK-debug-VHDL-program
- 基于VHDL硬件描述语言,对基带信号进行MASK调制-VHDL hardware descr iption language based on the modulated baseband signal MASK
8.11-PSK-debug-VHDL-program
- 基于VHDL硬件描述语言,对基带信号进行pSK调制-VHDL hardware descr iption language based on the modulated baseband signal pSK
8.9-ASK-debug-VHDL-program
- 基于VHDL硬件描述语言,对基带信号进行ASK调制-VHDL hardware descr iption language based on ASK modulation baseband signal
3G--mobil
- 3G移动终端基带信号处理器设计与实现该系统很好的实现了3G移动终端处理功能,但实际环境比仿真环境更复杂,需要给出解决办法,然后再验证。目前该方案实现了384 kb/s工作,使用3个时隙(每个时隙128 kb/s) 实现了基于高速下行分组接入(HSDPA)技术提高数据速率,它类似于WCDMA和CDMA2000标准所提供的速率。-3G mobile terminal baseband signal processor design and Implementation