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sheji
- 本科毕设，基于cpld的光栅信号处理，包含源代码和模块框图-Undergraduate Bi is located, based on cpld grating signal processing, including source code and block diagram
aludesign
- In computing, an arithmetic logic unit (ALU) is a digital circuit that performs arithmatic and logical operations. The ALU is a fundamental building block of the central processing unit of a computer, and even the simplest microprocessors contain one
alu
- In computing, an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. The ALU is a fundamental building block of the central processing unit (CPU) of a computer, and even the simplest microprocessors conta
test_sdram
- 对SDRAM进行读写，工程内部分为PLL以及复位处理模块、写SDRAM逻辑模块、读SDRAM逻辑模块、SDRAM读写封装模块、读写缓存FIFO模块、串口发生模块等。工程基于altera的Quartus II 10.1进行设计，使用更高版本的软件均可。-SDRAM read and write for the project is divided into the internal PLL and reset processing module, SDRAM write logic block,
gr-my-blocks-template
- design a basic signal processing block. Templates to create new blocks
Design_of_a_Basic_Block
- book about design a basic signal processing block.
FPGA_ARINC_429_design
- 机载数据总线ARINC 429在当代的运输机和相当数量的民用客机中有着广泛的应用。目前国内的专用ARINC 429信号处理芯片一般路数有限,要实现多通道的信息处理,就需要多块类似的芯片,从而体积就会变的比较庞大,非常不灵活。,因此利用FPGA和DSP相结合,设计和研制的ARINC 429总线信号处理板,成为目前飞机机载总线接口研究的重点,具有非常重要的现实意义和应用前景。 -The airborne data bus, ARINC 429 has a wide range of modern
verilog
- 本文档设计了1光栅位移传感器信号的接收、光栅位移传感器信号的整形及电平转换电路设计，用Verilog HDL描述了锁相倍频细分和零位信号处理电路。利用FPGA实现光栅位移系统与上位机接口的电路原理框图-This document designed a grating displacement sensor signal reception, grating displacement sensor signal shaping and level conversion circuit design