搜索资源列表
CY7C68013andFPGAinterface
- CY7C68013与FPGA接口的Verilog HDL实现-Verilog HDL CY7C68013 and FPGA implementation of the interface
SynchronizeAutomaticallyEntersCPLD
- CPLD与CY7C68013通讯程序，使用的是同步输入功能，测试过了可以使用，需要下载自动同步驶入的固件。-CPLD and CY7C68013 communication program that uses synchronous input function test can be used, you need to download the firmware automatically synchronized into.
TestProject
- 用fpga + usb ,fpga 用ep3c10e144 , usb 用釙68013日. 使用nios dma 傳輸數據至cy7c68013 , 經usb 到電腦-it use altera cyclone iii ep3c10e144 and cypress cy7c68013a to pc using nios dma to transmit data to pc via cy7c68013
FPGA IP cores
- FPGA IP cores on verilog for USB CY7C68013, VGA, Ethernet DM9000A, Sound WM8731.
13_usb_test
- fpga usb2.0 cy7c68013 黑金的板子(fpga usb2.0 cy7c68013)
0011.DBCONN
- File list(Click to check if it's the file you need, and recomment it at the bottom):