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FFT变换的IP核的源代码 VHDL~
- FFT变换的IP核的源代码 VHDL~-FFT IP core of the source code for VHDL ~
fft_verilog.rar
- FFT IP core 源码 状态控制机,FFT IP core
Quartus_fft_ip_core.rar
- Quartus中fft ip core的使用(modelsim 仿真FFT ip core 结合QUARTUS II 联合调试),Fft ip core in Quartus use (modelsim simulation FFT ip core integration QUARTUS II Joint Commissioning)
FFT_verilog
- verilog实现的FFT变换，经硬件测试其功能与Altera的FFT IP核相近-verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to
fft
- 基于VHDL语言编写的FFT程序，256点，旋转因子存在自己编写的ROM里面，乘法器和数据存储采用的是IP核-FFT-based program written in VHDL, 256 points, there is rotation factor which I have written the ROM, multiplier, and data storage is used in IP core
studyFFTcore
- 调用FPGA的IP核实现FFT运算，在xilinx的vertex4sx55FPGA的实现-Call FPGA implementation of the IP core FFT computation, in the Xilinx implementation of the vertex4sx55FPGA
FFTVHDl
- 基于FPGA的fft实现 摘要：本系统基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核，代替传统DSP芯片或高性能单片机，实现了基于FFT的音频信号分析。-FPGA-based realization of the fft Abstract: This system is based on Altera Cyclone II family of embedded high-performance FPGA embedded IP core
fftip
- Quartus中fft ip core的使用-Quartus in the use of fft ip core
pipelined_fft_256_latest
- FFT的ip核，是256位的，可以用在FPGA上进行FFT操作。-FFT' s ip core, is 256, and can be used in FPGA on FFT operation.
yy
- 使用XILINX公司提供的板子里面的FFT的IP核，很好用-XILINX board provided the use inside the FFT of the IP core, useful
pipelined_fft_64
- 利用IP Core编写的Verilog程序，实现FFT变换，希望对大家有帮助。-Written using Verilog IP Core procedures to achieve FFT transformation, we want to help.
fftip
- 2008-2009年优秀硕士论文之：基于FPGA的高性能32位浮点FFT IP核的开发-Outstanding Master' s thesis 2008-2009: FPGA-based high-performance 32-bit floating-point FFT IP core development
fft_2011_3_23(COMPLETE-FFT1024)
- VERILOG FFT IP核调用，以及其控制文件-VERILOG FFT IP core call, as well as its control file
fft_ug
- altera的FFT IP核的用户手册，介绍了如何使用ALTERA IP核生成FFT核，如何设置参数并讲述了如何仿真，适用于通信方面的FPGA设计工程师，学生。-altera' s FFT IP core user manual describes how to use the ALTERA IP core generated FFT core, how to set parameters and describes how to simulate, for communications, FP
FFT
- verilog 实现FFT IP核的控制，借鉴给需要学习的朋友-verilog achieve FFT IP core control, reference to the need to learn a friend
FFT-module
- IP CORE ：FFT模块使用方法，内含源代码，希望对大家有帮助。-IP CORE: FFT module use, including source code, we want to help.
vhdl-fft-core
- FFT ip core，fft信号处理模块， VHDL语言编写-FFT ip core
FFT-IPCORE
- QUARTUSII FFT的IP核，用VHDL实现。-QUARTUSII FFT IP core using VHDL implementation.
FFT-IP-CORE--of-Quartus
- Quartus中fft ip core的使用一点心得，希望对大家有所帮助。-The Quartus fft the ip core to use a little experience, we hope to help.
fft-ip-core
- 通过调用ISE中的fft IPcore实现了fft计算，输入数据通过textio从文本文件读入，处理后的数据再读入文本中。由于数据精度问题，与MATLAB计算的结果存在一定的误差-By calling the ISE of FFT IPcore implements the FFT computation, the input data through textio read a text file, after processing the data to read the text aga