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Fingerprint_Identify
- 本项目名称是：基于FPGA的指纹识别模块设计。 主要内容为：本模块采用xilinx公司的Spartan 3E系列XC3S500E 型FPGA作为核心控制芯片，通过富士通公司的MFS300滑动式电容指纹传感器对指纹图象进行提取，然后对提取的指纹图像进行灰度滤波、图像增强、二值化、二值去噪、细化等预处理，得到清晰的指纹图象，再从清晰的指纹图象中提取指纹特征点，存入外部FLASH作为建档模板。指纹比对时，采用同样的方法获得清晰的指纹图像，建立比对模板，然后将比对模板与建档模板利用点模式匹配
ofdm_modulation_v72
- This file contains a source code of OFDm system written in VHDL
sopcqrsxtjcjc23874
- 周立功《SOPC 嵌入式系统基础教程》ppt，这份ppt文件是最完整的。-ZLG " SOPC-based embedded system tutorial" ppt, the ppt file is the most complete.
Avt3S400A_Eval_MicroBlaze_v10_1_03
- Creating Your First MicroBlaze Design with the Spartan-3A Evaluation Kit This tutorial shows how to make use of XPS, BSB, and an XBD file to create and use a MicroBlaze soft processor system for the Avnet Spartan-3A Evaluation Kit.
FULLTEXT01
- this a program that contains the vhdl m file and vhdl code for the hole block diagram system-this is a program that contains the vhdl m file and vhdl code for the hole block diagram system
Verilog
- Verilog数字系统设计教程夏宇闻例题源文件-Verilog Digital System Design Education Chengxia Yu Wen example source file
xiayuwen
- 本程序是夏宇闻老师的verilog数字系统设计教程中的E2PROM完整程序文件，包括信号产生模块，E2PROM读写模块，E2PROM模拟模块，并且在ＩＳＥ上运行成功，测试正确，modelsim仿真成功-This program is the Xia Yu Wen digital system design tutorial E2PROM complete file, including the signal generation module, E2PROM reader module, E2P
TLC5510-VHDL
- （1）UART发送器VHDL程序 --文件名：transfer.vhd。 --功能：UART发送器。 --说明：系统由五个状态（x_idle,x_start,x_wait,x_shift,x_stop）和一个进程构成。 -(1) UART transmitter VHDL program- the file name: transfer.vhd.- Function: UART transmitter.- Descr iption: The system consists of
uclinux_v1_00_d
- 文件名uclinux_v1_00_d.rar，是基于XILINX的FPGA的uclinux操作系统，经本人在spartan 3/3e平台上验证可用。-uclinux_v1_00_d.rar is based on the XILINX s FPGA-uclinux operating system, after I verified in the spartan 3/3e platform available. File Name uclinux_v1_00_d.rar, is based on
VHDL
- For the animal file: we built a system that took in a UAC code and output if the animals need vaccines and if we are in danger of being eaten Seven_segment Clock_Design : built a clock State_machine: RoboRacer game (r9-bit LFSR) For the Elev
Xilinx
- Demux modules and test simulations with various combinations of input and output vectors.I am new to Verilog.I am learning it through a electronic system design course on my college.I am interested in downloading a single .zip file from this site,Ver
Nios_II_Exercises
- 嵌入式可编程片上系统设计SOPC课程实验资料，包括一个教Nios II使用的doc格式英文教程和对应工程文件。工程已解压，请自动忽略教程的第一步。-Embedded programmable system on chip design SOPC course of experimental data, including a Nios II used to teach English tutorial doc format and the corresponding project file.
ep2c5_test
- 该压缩文件是基于FPGA的SOPC系统基本测试程序-The zip file is the basic FPGA-based SOPC system test procedures
DE2_SD_Card_Audio
- 基于EP2C35F672Ｃ的ＥＤ２实验板自带源文件。DE2_SD_Card_Audio，ＳＤ卡和音频系统的联合操作。-ED2 based on the experimental board comes EP2C35F672C source file. DE2_SD_Card_Audio, SD card, audio system and the joint operation.
SGvga
- 基于System Generator 实现Xilinx FGPA的VGA显示模块，板块Nexys™ 3 Spartan-6 FPGA Board，可以直接把.bit文件下进去进行。 具体说明可以参考本人博客：http://www.openhw.org/wenlong0601/blog/12-03/239390_f7ef3.html-Based on the System Generator Xilinx FGPA VGA display module, the plate Nexy
VHDL-NoteTabs-
- 利用实验数控分频器的设计硬件乐曲演奏电路,主系统由三个模块组成，顶层设计文件，其内部有三个功能模块，TONETABA.VHD,NOTETABS.VHD,和SPEAKERA.VHD, 在原设计的基础上，增加一个NOTETABS模块用于产生节拍控制（INDEX数据存留时间）和音阶选择信号，即在NOTETABS模块放置一个乐曲曲谱真值表，由一个计数器的计数值来控制此真值表的输出，而由此计数器的计数时钟信号作为乐曲节拍控制信号，从而可以设计出一个纯硬件的乐曲自动演奏电路。-Experimental NC
TrafficLight
- 交通灯系统，基于VHDL语言描述，文件内有系统设计要求和完整代码-Traffic light system, based on VHDL descr iption of the system design requirements and a complete code within the file
vhdl
- vhdl状态机设计,文件简单详细易懂，可以使用在交通灯，文件配置等系统上。-vhdl state machine design, simple, detailed and easy to understand, you can use the traffic light system file configuration file.
liushuideng
- 利用system generator生成的流水灯verilog代码，matlab的model文件也在其中。在spartan3A上验证通过-The verilog code system generator to generate light water Matlab model file also. Spartan3A on validation by
8051_IP_DOC
- K8051单片机是以由VQM原码（Verilog Quartus Mapping File）表达的，在QuartusII环境下能与VHDL、Verilog等其他硬件描述语言混合编译综合，并在单片FPGA中实现全部硬件系统，并完成软件调试。-K8051 microcontroller in by the the VQM original code (Verilog Quartus Mapping File) expression, can under in QuartusII environmen