搜索资源列表
I2C
- 用verilog HDL实现I2C Master Controller 的设计，包括主程序设计和测试程序设计-Verilog HDL using I2C Master Controller to achieve the design, including the main program design and test program design
i2c-verilog
- 可进行i2c读写操作I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices. It is most suitable-it can write and read codes in i2c.I2C is a two-wire, bi-directional serial bus that provides a
I2C
- Verilog 实现 IIC 源码,包括各个时序信号的详细描述-Verilog code for IIC
i2c
- 标准I2c读写时序，verilog Hdl-Standard I2c read and write timing, verilog Hdl
i2c
- fpga verilog I2c 和 用以DSP mcbsp程序，测试过了-fpga verilog I2c and for the DSP mcbsp procedures, tested the
i2c
- IIC 接口EEPROM 存取实验（verilog实现） 按动开发板键盘某个键 CPLD 将拨码开关的数据写入EEPROM 的某个地址，按动另 外一个键，将刚写入的数据读回CPLD，并在数码管上显示。帮助读者掌握I2C 的总线协 议和EEPROM 的读写方法。-verilog
Mars_EP1C6F_Interface_demo(Verilog)
- FPGA开发板配套Verilog代码。芯片为Mars EP1C6F。一些接口通信的源码。包括7段数码管、I2C通讯等。-FPGA development board supporting Verilog code. Chips for the Mars EP1C6F. Some of the source interface. Including 7 digital tube, I2C communications.
i2c
- I2C协议verilog源码，包含完整的测试代码及设计文档。-Verilog source I2C protocol, including the complete test code and design documents.
verilog
- 通过I2C接口读写EEPROM 在本项目中，我们利用Verilog HDL实现了部分I2C总线功能，并能够通过该总线对AT24C02进行读写操作。为了便于观察读写eeprom的结果，我们将读写的数据同时显示在七段数码管上，并设定读写的数据从0到255不断循环，这样就可以方便进行比较。 -Through the I2C interface to read and write EEPROM in this project, we use Verilog HDL to achieve some o
I2C-CPLD
- I2C总线通讯的CPLD实现，包括详细的设计方法及源程序。-I2C总线通讯的CPLD实现
I2C
- iic verilog 从机程序 包含iic Verilog的主模块，控制模块和io寄存器模块-iic Verilog slave
I2C
- 此源码为基于FPGA的实现I2C总线协议的程序，程序中实现了AT24C02的芯片的读写。-The source code for the FPGA-based implementation of I2C bus protocol of the program, the program is implemented to read and write AT24C02 chip.
I2C
- I2C/IIC 总线接口驱动，在Altera和Xilinx的FPGA上跑过，Verilog编写，Craftor原创。V1.1。代码中还包含了24C02的读写测试程序，可直接用。-I2C/IIC Bus Driver, written in Verilog, v1.1. By Craftor
i2c
- I2C verilog代码，支持master和slave方式，内置CPU接口-I2C verilog RTL code， support master and slave mode
I2C
- 语言：verilog 功能：用Verilog HDL编写的I2C主机串行通信的程序。两条总线线路：一条串行数据线 SDA， 一条串行时钟线 SCL；串行的 8 位双向数据传输位速率在标准模式下可达 100kbit/s，快速模式下可达 400kbit/s ，高速模式下可达 3.4Mbit/s；在数据传输过程中，当时钟线为高电平时，数据线必须保持稳定。如果时钟线为高电平时数据线电平发生变化，会被认为是控制信号。 仿真工具：modelsim 综合工具：quartus -Language:
i2c
- I2C的RTL源码，verilog，验证过的-I2C verilog RTL
IIC1
- i2c verilog code for de2 board
I2C
- 自己编写的针对I2C芯片的Verilog读写程序，非常有用(I have written for I2C chip Verilog read and write procedures, very useful)
i2c
- I2C逻辑实现，完整的I2C逻辑功能，可以实现I2C主设备功能(I2C logic implementation, complete I2C logic function, can realize the function of I2C main equipment)
I2C-verilog-(非常详细的i2c学习心得)
- i2c学习心得，详细的I2C VERILOG实现代码(i2c learning experience, detailed I2C VERILOG implementation code)