搜索资源列表
DE2_70_D5M_LTM_NIOS_capture.zi
- 本文提供一個CMOS Controller，讓Nios II可以藉由CMOS Controller控制CMOS，並能讀出CMOS放在SDRAM中的影像。运行在DE2-70平台上,This article provides a CMOS Controller, so that Nios II can take advantage of CMOS Controller control CMOS, and allowed to deliver on the SDRAM in the CMOS imag
fpga_jpeg
- 图像jpeg压缩算法,用verilog HDL在FPGA上的实现 -Jpeg image compression algorithm, using verilog HDL Implementation in FPGA
Chapter10
- 第十章的代码。 本书通过100多个模块实例，详细地讲解了Verilog HDL程序设计语言，全书共分13章，内容涉及VerilogHDL语言基本概念、建模、同步设计、异步设计、功能验证等，实例包括各种加法器/计数器、乘法器/除法器、编码器/译码器、状态机、SPIMaster Controller、I2C Master controller、CAN ProtocolController、Memory模块、JPEG图像压缩模块、加密模块、ATA控制器、8位RISC-CPU等及各个实例模块相
codeFPGA
- source code verilog for get image 320x240 rgb form pc and display it on vga monitor
medianfilter
- 图像滤波中的中值滤波，有效滤除椒盐噪声，使用verilog语言编写-Image filtering in the median filter, effectively filter out salt and pepper noise, using verilog language
2DImageFilterByVHDL
- 用VHDL语言编程实现2维图像的滤波算法，简单精辟-VHDL programming language used to achieve 2-D image filtering algorithm, simple brilliant
CPLD_Config
- 用Altera CPLD做为控制器从Flash上读取image文件对Altera FPGA编程-Altera CPLD used as a controller to read image from the Flash on the Altera FPGA programming
xapp529_6_1
- 一些有用的IP核，本人也是刚涉及FPGA到开发，特别希望前辈们能够共享一些关于图像处理方面的IP核-Some useful IP core, and I was just involved in FPGA to development, particularly the older generation to share some information about aspects of image processing IP core
SOC_CCD
- 基于SOC 的线阵CCD 图像采集单元设计，关于ccd的资源-SOC based on the linear array CCD image acquisition unit design resources on the ccd
filter
- 图像处理技术中3*3模板的滤波电路的VHDL实现.-Image processing technology in the 3* 3 template VHDL implementation of the filter circuit.
edge
- 图像处理中边缘检测的VHDL源代码,所用的算法是garbor变换-Image processing edge detection of VHDL source code, the algorithms used are garbor transform
jpeg.tar
- This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x288). Image resolution is no
golomb
- golomb编码，用于无损图像压缩等，基于quartusii平台。-golomb coding for lossless image compression, based on the platform quartusii.
video_control_procedure
- 用VHDL实现视频控制程序(实现对图像的采集和压缩)-Using VHDL video control procedures (the achievement of the image acquisition and compression)
median_filterCode
- 采用快速中指滤波算法实现图像的中值滤波，使用VHDL语言ISE环境-Image Median Filter
fpga
- FPGA based implementation of an invisible robust image water marking encoder
webCam-FPGA
- 使用Verilog控制美光CMOS图像处理器，并转存到SDRAM中。使用FPGA为QL的带fuse系列-Control the use of Verilog Micron CMOS image processor and SDRAM in转存到. FPGA for use with QL series fuse
vidiocpt
- 本代码为富士通MV86S02的CMOS图像传感器的VHDL驱动代码-The code for Fujitsu MV86S02 the CMOS image sensor-driven VHDL code
test_in
- 用Verilog编写的产生图像的程序，实现24位数据量产生图像使用DA转换后直接显示-Verilog prepared using the procedure for selecting the images to achieve 24-bit image data generated using the DA converter and directly show the
Image-Composite-Editor-Multi-Image-Fusion
- fpga video for fuse two image and compare the feature