搜索资源列表
Matlab-m-sequence-generator
- 介绍m序列和教你如何利用matlab进行编译m序列-Introduction of m-sequences and teach you how to use the matlab compiled m-sequence
signal
- EP2C5Q208C8 verilog 产生m序列 50M晶振分频得到时钟,可以选择10种时钟- -!-EP2C5Q208C8 verilog 50M m-sequences generated by dividing the crystal clock, you can choose from 10 clock--!
jiarao4
- 加扰与解扰,VHDL实现。初始寄存器值为1产生的m序列。-Scrambling and descrambling, VHDL. Initial register value 1 of the m-sequences generated.
scramble_m_que
- 产生19级m序列,实现加扰和解扰的全过程。-19 m sequences, the scrambling process
mPsequences
- m序列信号发生,用verilog编写,在fpga上可实现-m sequences
m_sequence
- 基于fpga verilog语言生成的m序列。(Generating m sequences based on FPGA)
m-test
- 产生小m序列,用于扩频系统中,仿真测试正确,反馈级数为4(Generating m sequences)