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led_flash
- 一个简单的流水灯设计，适用于Verilog入门的同学，练习如何进行简单的硬件语言描述-A simple water lamps designed for Verilog entry students practice how to make simple hardware descr iption language
led_seg7
- 七段数码管显示实验，通过运行程序可以让数码管，显示不同的数字。-Seven segment digital tube display experiment, through the operation of the program can make digital tube, showing different figures.
anjianled
- 用按键控制流水灯一左移动亮起来，可自己修改成自己想要的型式-With a light water control buttons to move left lights up, you can make changes to the type you want to
vga
- This VHDL sample demonstrates how to generate a VGA signal to make it possible to connect an FPGA to a monitor. Written for Mimas v2, but probably easily adapted to any other board with a VGA connector on it (that can also be done by manually connect
DDS(ok)
- 制作ROM正弦表并填充FPGA内部ROM，通过调用内部数据实现正弦波输出，开发环境quartusii , 语言verilog , 调试通过 ， 附有modelsim调试结果。-Make ROM sine table and fill the ROM internal FPGA, by calling the internal data to achieve the sine wave output, development environment QuartusII, Language Veri
verilog
- 用fpga制作一个音乐播放器，此为浙江大学信电系fpga教程大实验成果。-Use fpga make a music player, this is the letter Electrical Zhejiang University fpga tutorial big experiment results.
soma_loka
- Sum make in vhdl code
code-hmwk7
- Make the required flag signals using the input clock signal (clk) and input flag (TKN). Whenever the TKN signal is activated, a sequence of activation of flag signals should be performed based on the timing diagram
CNT12
- 通过一个简单完整而典型的12进制计数器的VHDL设计实例，来使大家初步了解用VHDL表达以及由此而引出的VHDL语言现象和语句规则。 让大家能够迅速的从整体上把握VHDL程序的基本结构和设计特点，达到快速入门的目的。 -Through a simple and complete and typical 12-band counter VHDL design examples, to make preliminary understanding of VHDL expression and the
Error-generation
- 误差产生模块：通过给定值与反馈值做差，产生一个带正负的误差值-Error value by a given value and the feedback value make the difference, resulting in a band of plus or minus: error generating module
FIR滤波器
- STM32f407 DSP库应用 FIR滤波器 用示波器测试PA8，可以测出1Khz的正弦波。如果不是，修改PWM参数，使其正好为1Khz.(STM32f407 DSP library uses FIR filter Oscilloscope PA8 test, you can measure the sine wave of 1Khz. If not, modify the PWM parameter to make it exactly 1Khz.)
verilog uart v1.0
- 基于Verilog语言写的UART模块，非常实用，可以参考，希望共同进步(Based on the Verilog language to write the UART module, very practical, you can refer to, hope to make progress together)
USB-Blaster原理图
- 这上一个USB-Blaster原理图,给有需要的开发者做参考！！(This last USB-Blaster schematic, to the needs of developers to make reference!!)
led
- 利用计数器设计延时函数，通过四个led灯的闪烁，可以直观观察延时时长，fpga器件cyclone iv LCMXO2-1200HC-4TG144CR1,在demo板上作简路图(Using the counter to design the delay function, through the flashing of four LED lights, we can observe the delay time directly, FPGA device cyclone IV LCMXO2-12
30085
- turbo c writing, and random fireworks animation, size, color, make their own adjustments. the the
CH04-KEA128-Light
- 使小灯亮,并且调节寄存器，使小灯闪烁，以不同的时间间隔(Make the small light on, and adjust the register, make the small light flashing, at different time intervals)
hld
- 实现红绿灯功能，增加PASS功能，使红灯强制复位到3s倒计时(Realize the function of the traffic light, increase the PASS function, make the red light reset to the 3S countdown)
aud
- 秒表小炸弹 用秒表做一个计时器，时间一到就会爆炸(stopwatch Make a timer with a stopwatch and explode when the time comes)
07_uart_test
- 利用FPGA的并行方式调试UART，与单片机的调试方式做比较(Using FPGA to debug UART in parallel, make comparison with the way of MCU debugging)
VHDL简易电子琴设计(1).doc
- 这是一个简单的基于vhdl的电子琴，有自动播放和使用按键来制作不同的音色。(The design of a simple electronic organ based on VHDL, with the automatic playing and the use of keystrokes to make different tones)