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all_MedFilter_VHDL
- 本文介绍了中值滤波算法的FPGA详细实现，很详细，很全-This article describes the median filter algorithm to achieve the FPGA detailed, very detailed, very full
Code_for_MedianFilter33
- 数值图像处理：中值滤波设计，3*3方形窗，边缘检测的设计代码-Numerical image processing: the median filter design, the design code of 3* 3 square window, edge detection
Reconfigurablefliter
- 自己编写的SystemC源代码，拥有五级流水线的可重构图像滤波器，支持两种图像滤波算法，中值滤波和邻域平均滤波，支持算法配置-I have written SystemC source code, the reconfigurable image filter has a five-stage pipeline, supports two types of image filtering algorithms, median filtering and neighborhood average
median_filter
- 中值滤波的verilog实现，完整工程，调试通过-Median filter verilog achieve complete engineering, debugging through
zhongzhilvbo
- xilinx ise 与modesim联合验证中值滤波 含verilog源程序和整个工程文件-the xilinx ise modesim median filter containing joint verification verilog source, and the entire project file
camera_test6
- 摄像头数据进行3*3表格的处理 然后进行中值滤波，8级流水线，速度快-Camera data for 3* 3 forms processing and then median filter, 8 lines, fast
filters_FPGA2
- this is vhdl code of median filter
median5x1
- 一个自己写的5x1中值滤波算法，可以直接使用.-It is 5x1 median filter arithmetic.
图像中值滤波FPGA实现V1.0
- 实现图像的中值滤波功能，文件里有效果展示(The realization of the median filter function of the image, the file has the effect of display)