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pciug159
- XILINX ISE生成PCI-CORE时产生的用户文档,帮助编写PCI通信用户逻辑,非常有用-XILINX ISE generation PCI-CORE generated user documentation to help users prepare PCI communication logic, a very useful
sp601_MIG_rdf0005_12.2
- spartan—6fpga 用mig生成ddr2接口的ip核，用户可以直接调用此ip控制ddr2-spartan-6fpga generated by mig ddr2 interface ip core, the user can call this ip control ddr2
Automatically
- 硬件加速器自动生成白皮书 (PDF)里面有介绍alteraFPGA的硬件消息资料可以供初学者学习-Automatically generate the hardware accelerator white paper (PDF) which has introduced alteraFPGA hardware information can be found for beginners to learn
xapp1052
- ML605开发版 生成IP核的时候选择250MHZ pcie2.0 X4 5Gb/s 其他参考PDF文档。(When the ML605 development version generates the IP kernel, select 250MHZ pcie2.0 X4 5Gb/s Other reference PDF documents.)