搜索资源列表
dds_ise7.1_su
- 用Verilog语言实现信号发生器,包括AM,FM,PM,ASK,PSK,FSK调制。-using Verilog language signal generator, including AM, FM, PM, ASK, PSK, FSK modulation.
dds_sin
- 此程序是基于fpga的多功能的信号源程序,能调相,调频,调幅等。-This program is based on fpga s versatile signal source can be PM, FM, AM and so on.