搜索资源列表
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FPGA编程,用Verilog语言实现4位累加器功能-The FPGA programming, realize four accumulator with Verilog language features
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FPGA编程,用Verilog语言实现出租车计费器功能-The FPGA programming, the taxi is realized with Verilog language features
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FPGA编程,用Verilog语言实现序列检测功能-The FPGA programming, using Verilog language implementation sequence detection
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需要实现点阵按列依次并且循环显示的效果,可以分析视觉上可以观察到列的变化,则列的扫描频率必定要远远小于行扫描的频率。在程序中,设置行扫描的频率等于前次实验中数码管扫描的频率,设置列扫描的频率为5HZ,即每0.2s显示亮的一列向前推进一列。在程序中,使用16进制计数作为74HC154的输入:分出5hz的频率,并用其计数,将计数值作为74HC154,则其译码产生的输出变化也为5hz,并且实现每列一次选通。由于每行对应的数码管共阳极。直接赋高电平。则可以实现所需要的功能。行扫面则是要实现先依行点亮,
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FPGA 实验:在液晶1602第一行显示Welcome to FPGA,第二行显示0-9的数字循环,并设置有复位键。学会了1602液晶每行显示的设计,理解1602液晶的具体结构,此程序基于Quartus的编程环境,采用Veilog语言编写。-FPGA experiment: the first line of LCD second show to FPGA Welcome, the 1602 line shows the digital cycle of 0-9, and set the res
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FPGA之ADC0804实验(1)程序是用ADC0804显示00-ff(2)将其转换成0-255;(3)将其转换成0-5.0V; (4)如果输入电压大于2.5V,设定报警灯亮。此程序基于Quartus的编程环境,采用Veilog语言编写。-ADC0804 FPGA experiment (1) program is to use ADC0804 00-FF (2) will be converted into 0-255 (3) will be converted into 0-5.0V (
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FPGA之TLC5620:将所给程序下载到实验箱,观察现象并结合现象理解程序的含义,使其实现单通道的DA转换:在按下通道的按键之后,用数码管显示输入的数字量,停止按键,数码管计数停止,继续按键则继续计数,按下复位键,则系统清零,数码管显示零值。此程序基于Quartus的编程环境,采用Veilog语言编写。-FPGA tlc5620: to the program downloaded to the box observed phenomenon and combined with the phe
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基于quartus II verilog语言编程,实现有源蜂鸣器播放两只老虎 -Based on quartus ii verilog language programming, the realization of active buzzer playing two tigers
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采用verilogHDL语言编程,对4x4键盘进行编码并且调制成红外遥控信号,适用于可编程逻辑器件的红外遥控解码逻辑设计。-Use verilogHDL language programming, to 4 x4 keyboard encode and made the infrared remote control signal, is suitable for programmable logic devices of infrared remote control decoding log
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基于CPLD的38译码器程序设计,使用VHDL语言编程,38译码器显示在数码管上。-CPLD programming decoder 38 based on the use of VHDL language programming, the decoder 38 is displayed on the digital tube.
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基于CPLD的流水灯实现,使用VHDL语言编程,闪烁间隔为0.5秒。-CPLD-based water lights to achieve using VHDL language programming, blinking interval of 0.5 seconds.
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基于CPLD的步进电机控制实现,使用VHDL语言进行编程,通过控制开关,可以实现正转快速,正转慢速,反转快速,反转慢速四种不同的状态。-
Based on CPLD stepper motor control implementation using VHDL language programming, by controlling the switch, you can achieve fast forward, slow forward, fast reverse, reverse sl
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基于FPGA实现AD采集并通过数码管显示的程序
使用芯片为EP2C8Q208C8N,所用AD9280,使用Verilog语言编程,本例子有工程文件、仿真、波形,经过测试可以使用。-Based on FPGA chip AD acquisition and use of EP2C8Q208C8N, used AD9280, using Verilog language programming, the present examples are engineering documents,
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基于FPGA实现8路抢答器功能
使用芯片为EP2C8Q208C8N,实现40秒内8路抢答功能,八路键盘输入,使用Verilog语言编程,本例子有工程文件、仿真、波形,经过测试可以使用。-8 based on FPGA Responder feature uses chips EP2C8Q208C8N, 40 seconds to achieve 8 Responder features eight keyboard input, using Verilog language programm
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基于FPGA实现FIR滤波器功能
使用芯片为EP2C8Q208C8N,实现FIR滤波器的设计,使用Verilog语言编程,本例子有工程文件、仿真、波形,经过测试可以使用。-FIR filter function based on FPGA chip to use EP2C8Q208C8N, achieve FIR filter design using Verilog language programming, the present examples are engineering doc
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基于FPGA实现数码管数字时钟功能
使用芯片为EP2C8Q208C8N,使用数码管显示数字时钟,使用Verilog语言编程,本例子有工程文件、仿真、波形,经过测试可以使用。-Based on FPGA digital tube digital clock function uses chip EP2C8Q208C8N, use digital display digital clock, using Verilog language programming, the present exam
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基于FPGA实现蜂鸣器播放音乐的功能
使用芯片为EP2C8Q208C8N,使用普通蜂鸣器,由于频率不同可实现放歌功能,本例设计的是《友谊地久天长》,使用Verilog语言编程,本例子有工程文件、仿真、波形,经过测试可以使用。-Play music based on FPGA buzzer functions using chip EP2C8Q208C8N, using ordinary buzzer, since the frequency of different functions ca
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此代码是ADI公司的锁相频率合成芯片ADF4360配置程序,采用Verilog HDL语言编程,并且经过实验验证。-This code is ADI PLL frequency synthesizer chip ADF4360 configuration procedures, using Verilog HDL language programming, and after experimental verification.
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FPGA verilog语言编写 通过拨码开关SW0-1控制四种不同流水方式-FPGA verilog language programming DIP switch SW0-1 control four different water way, and can set the starting light
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VHDP入门级教程,实用编程100例,非常适合新手,工程齐全,上手快,是Verilog语言开发工作者的必备代码。-VHDP entry-level tutorial, practical programming 100 cases, very suitable for novice, complete engineering, quick start, Verilog language development workers are essential code.
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