搜索资源列表
ssram
- 同步静态RAM读写程序，可用作模块，已通过ISE12.4验证-Synchronous Static RAM read and write procedures, can be used as modules, have been verified by ISE12.4
dual_port_ram
- 实现双口ram的读写功能，并含有测试文件，已经经过方针验证，很好用的-the writing and reading to the dual port ram ,good
DDR_FLASH_VHDL_Verilog
- FPGA DDR 外部RAM 读写的verilog代码，以及FLASH的vhdl代码-DDR SRAM READ AND WRITE VERILOG CODE ,FLASH VHDL CODE ,FPGA
ram_verilog
- 本程序用verilog实现实现了RAM读写功能-This programe describe the properties of reading and writing ram.
TLC5510_IIPRAM1
- FPGA控制双口RAM、实现TLC5510采样控制双口RAM读写！QUARTUS II8.0平台仿真验证通过，并在硬件上运行通过测试！-FPGA control of dual-port RAM, the realization of sampled-data control TLC5510 dual-port RAM read and write! QUARTUS II8.0 platform through simulation and hardware to run through the
ram_Test
- RAM读写控制器，用verilog实现的简单易懂的RAMROMsram控制核-Controller RAM read and write, using verilog implementation of easy-to-understand control of nuclear RAMROMsram
ram
- 存储器模块生成，采用16位数据总线，5位读写地址总线，异步清零！-Memory modules generated, using 16-bit data bus, 5 to read and write address bus, asynchronous Clear!
fpga.fifo
- 异步FIFO是用来适配不同时钟域之间的相位差和频率飘移的重要模块。本文设计的异步FIFO采用了格雷（GRAY）变换技术和双端口RAM实现了不同时钟域之间的数据无损传输。该结构利用了GRAY变换的特点，使得整个系统可靠性高和抗干扰能力强，系统可以工作在读写时钟频率漂移达到正负300PPM的恶劣环境。并且由于采用了模块化结构，使得系统具有良好的可扩充性。-Asynchronous FIFO is an important module which always used to absorb the
IDTContrl
- 该Verilog程序提供了一种控制IDT系列Ram的读写操作程序，每次读写750个16位的数。-The Verilog program control IDT provides a series of read and write operating procedures Ram, 750 each to read and write the number 16.
fifo_test
- FIFO读写verilog程序，经本人验证，能够顺利运行。实现FPGA对fifo的控制。-the example of writing and reading the fifo ram of the fpag,i have already tested it.
testRAMWR
- 这是一个用VHDL编写的读写双口RAM的程序.-This is a work written in VHDL to read and write dual-port RAM program.
ram
- 实现了对于SRAM的读写控制输入和输出，能够连续的进行读写操作以及能够对各种四则运算的嵌入-Achieved for the SRAM read and write control input and output, can continuous operation and can read and write all four of embedded computing
ram
- 用VHDL描述了RAM的读写,很好的一个小东东,要你好好学习,用于开发RAM-OK,OK,VHDL ,FPGA,RAM,WRITE AND READ ,YOU WILL LIKE IT,ARE YOU?
my_RAM
- pdf actel fpga verilog ram读写-pdf actel fpga verilog ram read and write
read-RAM
- 读写RAM，很好用，我自己写的。 读写RAM，很好用，我自己写的。-Read and write RAM, is useful, I wrote it myself.
DU-RAM
- 本程序是一个双口RAM的读写程序，在很多工程中，特别是存储器中运用广泛-This program is a dual-port RAM read and write procedures, in many projects, especially the extensive use of memory
vga-with-double-port-ram
- fpga 读写双端口ram并使用VGA进行显示，基于de2-115-vga with read and write double port ram
基于FPGA的乒乓RAM
- 控制读写乒乓RAMip核代码，通过控制FPGA内部RAM的的读写地址来控制RAM的读写
RAM
- 用verilog实现了IP核的使用，例化了一个RAM，用来进行读写操作，另外还编写了斐波那契数列来进行测试。-Using verilog to achieve the use of IP core, the instantiation of a RAM, used to read and write operations, in addition to the preparation of the Fibonacci sequence for testing.
ram
- 基于VHDL的教学实验机ram芯片连续读写-RAM chip based on VHDL continuous read and write