搜索资源列表
MCU_FPGA_Interface
- msp430单片机用IO口模拟总线时序，与FPGA进行交互的程序，附源代码，verilog，有简单文档。-msp430 I single-chip analog IO bus with timing, with the FPGA interactive process, with the source code, verilog, a simple document.
a-software-uart
- C8051工作在48Mhz下，完全有能力进行资源的扩展，以实现低成本处理器完成更复杂的任务，文章提出了一种通过单片机普通IO端口完成串口通讯的方法，很好的弥补了通讯端口不足的瓶颈 -C8051 work in 48Mhz, the resource is fully capable of expansion, in order to achieve low-cost processor to complete more complex tasks, the article presents a
source
- IO转UART的数据收发控制和收发数据代码，中文注视，能够清楚了解代码含义-IO UART data transceiver control and send and receive data code, Chinese gaze, knowing code meaning
UART
- verilog IO模拟串口,用IO模拟uart进行串口通讯，无需硬件串口(Verilog io analog serial port, using io simulation UART serial communication, no hardware serial port)
uart_test
- 用verilog实现的一款232协议的源码，支持光纤传输，IO通道传输等等传输方式。(Verilog implementation of a 232 protocol source code, support fiber transmission, IO channel transmission and so on transmission.)