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lab4
- 上传的文档以及代码是利用system generator来实现一些简单功能的实例，主要给system generator初学者一些参考-Upload documents and code using system generator to implement some simple examples of functions, primarily to beginners some reference system generator
lab5
- 上传的文档以及代码是利用system generator来实现一些简单功能的实例，主要给system generator初学者一些参考-Upload documents and code using system generator to implement some simple examples of functions, primarily to beginners some reference system generator
sr_flip_flop.ZIP
- I upload a source code for SR flipflop here.
project_zyg
- 利用HC——SR04的超声波模块与EGO1板子外加一个EMAX电机形成一个测距报警器 上传文件为vivado程序(Using the HC - SR04 ultrasonic module and the EGO1 board plus a EMAX motor to form a range finder to upload the file as the vivado program)
multi_key_dict-master
- You should upload 5 codes/documents files2
uart
- 此上传文件实现的功能就是FPGA里实现从PC接收数据，然后把接收到的数据发回去。 使用的是串口UART协议进行收发数据。(The function of this upload file is to receive data from PC in FPGA and send back the received data.The serial port UART protocol is used to receive and receive data.)
mic_leda
- 此上传的是在FPGA的spartan 3e系列开发板上面实现跑马灯功能的源代码。(This upload is to achieve marquee function in Spartan 3E series development board above FPGA source code.)
vga
- 此上传的是在FPGA的spartan 3e系列开发板上面实现黑白块VGA显示功能的基于Verilog的源代码。(This upload is based on FPGA's Spartan 3E series development board to achieve black and white VGA display function based on Verilog source code.)