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USB 2.0 IP Core
- USB20的IP CORE,可以直接用在SOPC下，自动完成全部的枚举，只需修改枚举参数即可！-USB20 IP CORE, can be directly used in SOPC, automatically complete the enumeration. only a modification of enumerated parameters can be!
USB.rar
- 用VHDL实现的USB IP核，大家可以参考下,Use VHDL to achieve USB IP core, we can refer to the following
FPGA-usb-control
- USB 68013 通用固件 和配套上位机程序以及下位机FPGA程序verilog 可实现USB高速通信-USB 68013 generic PC firmware and supporting procedures and lower computer USB FPGA program can achieve high-speed communications
xilinxfpga_jtag
- XilinxUSB EEPROM是xilinx usb下载线的EEPROM程序，可以用来做xilinx的usb下载线-XilinxUSB EEPROM is xilinx usb download cable in the EEPROM program can be used to make the usb xilinx download cable
can
- 基于Verilog HDL 的一个CAN总线IP核。-Based on Verilog HDL a CAN bus IP core.
USBandFPGAjiekou
- USB与FPGA接口的程序设计。里面是所有的源文件都经本人测试可以用，放心下载吧-USB interface with the FPGA programming. Inside are all the source files have been tested, I can use, rest assured that you download
FPGACPLD
- FPGA数字电子系统设计与开发实例导航> 一书的代码，FPGA数字电子系统设计与开发实例导航,用硬件描述语言编写的，I2C,UART,USB，VGA，CAN-BUS，网络等等的书籍配套原代码。。。。使用方法： 1.拷贝到硬盘。 2.用ISE创建项目，分别加入各个代码文件，即可
USB
- Verilog实现的USB程序，用ISE打开工程文件即可-Verilog implementation USB program, open the project file with the ISE can be
ActelFPGA_HE_ApplicationNote
- 在手持式设备的应用中(包括智能电话、相机和 MP3 播放器)，用户大多考虑低功耗、 小尺寸，整个系统中除了处理器外，往往需要提供多种通信接口与存储器接口，用于实现对 硬盘、SD 卡、CF 卡以及 USB 的通信等，用 FPGA 来实现这些接口将会是一种理想的解决 方案。本方案采用 Actel 低功耗的 IGLOO 系列作为处理器(PXA270 或 ARM)的桥接器件和 设备控制器，不仅能够大大简化处理器设计的复杂度，而且 IGLOO 的超低功耗 (最小 5μ W)以及超小封装
CAN_I2C_USB_yuanma
- CAN总线，I2C，USB等的FPGA实现源码，可以利用原有代码，快速开发出自己的代码，物有所值-CAN bus, I2C, USB, etc. FPGA implementation source code, we can use the original code, and to quickly develop its own code, value for money
USB
- 用VHDL编写实现的USB接口控制器源码，自带testbench，解压后用ISE打开工程文件即可。-Prepared with the VHDL source code to achieve the USB interface controller, bring their own testbench, after decompression project file can be opened with the ISE.
8051
- USB_VHDL USB文件 大家可以参考一下-USB_VHDL USB file you can refer to what
usb_jtag
- usb通过Jtag口进行下载的源码程序，可以方便的通过它下载到EPROM里面-usb port for downloading through the Jtag source programs can be easily downloaded to the EPROM which through its
FT2232H_USB_Core
- 在FPGA外扩用FT2232 实现UART TO USB 2.0 的通信。-The FT2232H is a USB2.0 Hi-Speed USB Device to FIFO IC. This core allows the use of this chip with an FGPA design in high speed FT245 style synchronous FIFO mode. Data rates up to 25 mbytes/s can be achieve
Oscilloscope
- The design is designed partly in VHDL, partly in schematic drawings and targets a Xilinx Spartan-2E FPGA. However, since the design was tailored specifically for the aforementioned boards it is highly unlikely that it can be ported to other hardware.
USB--LCD
- USB+LCD1602的现实 USB芯片CY7C68013 可以显示任意数-USB+ LCD1602 reality CY7C68013 USB chip can display any number of
USB
- USB控制器的VERILOG工程文件，工程为ISE的，可以编译通过，压箱底的东西了-USB controller VERILOG project file, works for the ISE, you can compile, pressure bottom of things
USB-to-RS232-adapter-module
- 母板通过FR232R芯片及其外围电路实现USB接口转UART（TTL电平）接口，并提供自定义的双列插针扩展接口；功能子板则分为RS232接口和TTL接口两种，并可根据需要设计RS485/RS422/CAN总线接口。-Motherboard chip by FR232R USB interface and its peripheral circuit switch UART (TTL level) interface, and provide a custom double-row pin exp
usb_rd_buffer
- FPGA（SPARTAN6）通过USB协议与开发板上的USB芯片进行数据读写测试，在上位机上可以看到USB发来的数据，也可以通过修改VERILOG代码完成数据的接收(FPGA (SPARTAN6) can read and write data through the USB chip on the development board through the USB protocol. The data sent by USB can be seen on the host computer,
CAN总线，I2C，USB等的FPGA实现源码
- 控制器局域网总线协议的Verilog代码(The Verilog code of the CAN bus protocol)