vc++与vhdl代码,cpld接受pc串口指令,输出pwm信号控制伺服电机.双通道,各128级.使用了扩展ascii码

基于PCI的数据发送源,上位机为VC编写，桥芯片为PLX9054，项目已经做完，上传5个例程，已经验证通过-PCI-based data transmission source, PC for VC preparation, bridge chip for PLX9054, the project has been done, upload 5 routines, has been verified by

基于SDRAM的PCI采集,上位机为VC编写，桥芯片为PLX9054，项目已经做完，上传5个例程，已经验证通过-SDRAM, PCI-based acquisition, PC for VC preparation, bridge chip for PLX9054, the project has been done, upload 5 routines, has been verified by

这是项目总的文件夹，包括原理图，PCB,上位机VC程序，驱动程序，下位机FPGA程序，可做为开发板，LVDS采集开发板，前面上传的5个位五个测试程序，已经验证其正确性，需要的可以参考。-This is the total project folder files, including schematics, PCB, PC VC, the driver, the next crew FPGA program can be used as the development board, LVDS c