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verilog写的数字频率计的选择模块,用与显示的选择-written in Verilog digital frequency meter option module, used and display options
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数字频率计的源码
最大测量频率达到30MHz-Digital frequency meter measuring frequency of the source code to achieve the maximum 30MHz
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等精度数字频率计的Verilog源码，从上到下的设计思路，分为6个模块。上过Altera公司的FPGA板。
供大家参考，希望大家不要照抄！-Such as precision digital frequency meter Verilog source code, from top to bottom of design ideas, divided into six modules. Been to Altera' s FPGA boards. For your reference, h
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verilog hdl 开发的频率计，运行环境 DE2-115开发板，内有modelsim仿真用的testbench。RTL级代码-verilog hdl developed frequency meter, operating environment, the DE2-115 development board, modelsim simulation of the testbench. RTL-level code
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自动售货机，乐曲演奏电路，4 位数字频率计等详细程序代码-Detailed code of vending machines, the music playing circuit, four digital frequency meter
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本文件用于测波形频率的verilog代码，是典型的数字频率计的源代码(This document is used to measure the frequency of the Verilog code, the source code of a typical digital frequency meter)
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