搜索资源列表
mcs_51_cpld
- 程序主要用硬件描述语言（VHDL）实现： 单片机与FPGA接口通信的问题-procedures major hardware descr iption language (VHDL) to achieve : MCU and FPGA interface communication problems
mcuconnect
- 基于VHDL语言开发的mcu与外部器件的接口程序，解决了高速mcu与低速外部器件的接口问题。-based on VHDL development mcu with external device interface, mcu solve the high-speed and low-speed external device interface.
8051_nios_vhdl
- 8051 MCU在nois平台上的实现代码（VHDL），出自Altera公司，经过严格测试核验证-nois 8051 MCU platform in the realization of code (VHDL) from Altera Corporation, after strict verification of nuclear test
uart_for_MCU
- 用VHDL为MCU编写的可用UART-通用异步收发器程序
mcuconnect
- 用VHDL来提高MCU的连接速度。对MCU有兴趣的朋友，值得下载一看。
mc_8051
- 该源代码是实现了8051 mcu core的VHDL代码，中断、计时等各功能全面，且包括了各部分的详细测试文件
am2901
- 4位MCU AM2901的完整VHDL程序，AM2901为主程序，其他为实体库
shibo(ok).rar
- 基于cycloneII和MSP430单片机的示波器，利用spi模块进行双机通信,Based on the MSP430 MCU and cycloneII oscilloscope, using dual-spi communication module
8051
- alter公司的mcu核，8051ip核，为quartus2设计，其他应该兼容 -alter the company' s mcu nuclear, 8051ip nuclear, for quartus2 design should be compatible with other
SPI
- VHDL语言编写的SPI通信接口,可实现与单片机等外部MCU的通信,且只占用较少的引脚线-Written in VHDL SPI communication interface, can be realized with the microcontroller and other external MCU communication, and only takes less pin line
3Channel_CIS_Processor_with-VHDL.ZIP
- This usefull source for control CIS Sensor and has fallowed functions 1) Read image data frome 3channel 200dpi CIS Sensor 2)Encoder Sync Technoledge for more high resolution analiysys with shared the time divition 3)Psudo Video Ram Read by
VHDL-8031-IPCore
- this a ipcode of 51 mcu!-this is a ipcode of 51 mcu!
reload_fir
- 这是我在Xilinx公司的FPGA上实现的FIR滤波器，调用的内部核，其特色是可以用较少的资源实现该功能，而且可以实现参数重载，即从外部MCU设置FIR滤波器的参数-This is my Xilinx FPGA to achieve the FIR filter, called internal audit, its characteristics can be achieved with fewer resources to this function, and the overload p
watchdog
- 看门狗定时器Verilog源码；用于MCU的辅助模块，定时特定的时间来做硬件复位，是用于避免固件跑死的一个机制。-Watchdog verilog source.
DHT22_v1.1
- 我以前曾发过V1.0版的，这是此版的修正版v1.1,修正了以前版本中的一个错误，即只能读一个数据后就再也读不出温度数据的错误。 这个是用Quartus II软件写的Verilog HDL语言写的与温湿度传感器DHT2x通信的代码. 里面有详细的注解. 主要用于DHT2x单线总线通信转换为8位并行总线通信,应用于具有外部8位总线访问功能的单片机直接读取温湿度数据. 此程序在EPM7128SLC-10中成功测试. -I' ve once spoke V1.0 version, whic
MCU
- 这是用VHDL语言编写的程序，，这只是个例子供大家参考，希望给大家带来帮助-It is written in VHDL program, this is only an example for your reference, hoping to give us help
nand_flash_ctl
- FPGA flash 控制读写程序 与mcu相连-FPGA flash control is connected to read and write procedures and mcu
FPGA_SPI_VHDL
- 串行外设接口（SPI）fpga 被动接收,在下降沿 采集数据并发送数据 1BYTE,要求mcu在末端采集数据。并在下降沿之前准备好数据。-Serial Peripheral Interface (SPI), The fpga passive receiving, at the falling edge of data collection the send data 1BYTE, mcu data collected at the end. And the data ready before t
The--VHDL-code-of-I2C
- 该程序采用延时接收比较来实现仲裁的方法，使不具有I2C接口的普通微控制器（MCU）能够实现模拟I2C总线的多主通信。-This program is to realize the delay receiving the arbitration method, do not have the I2C interface of ordinary micro controller (MCU) can simulate the I2C bus more than the main communicati
VHDL-8bitFIFO
- FIFO的宽度：也就是英文资料里常看到的THE WIDTH，它只的是FIFO一次读写操作的数据位，就像MCU有8位和16位，ARM 32位等等，本程序实现8位的FIFO功能,三位格雷码可表示8位的深度。-THE WIDTH of THE FIFO: namely information in English often see THE WIDTH, it is only a FIFO data read and write operations, as has 8 bit or 16 bit M