搜索资源列表
voda
- Water vending machine
LED
- 流水灯，实现几个led灯 的轮流点亮，可以控制速度。-Water lights, led lights to achieve a few turns lit, you can control the speed.
ls_led
- 实现流水灯的程序，适合初学者参考和学习。-Achieve light water program, suitable for beginners reference and learning.
LED
- basys2 流水灯 verilog语言编写-basys2 light water verilog
FPGAVHDL
- vhdl例程代码大全，包含流水灯，数码管，AD,DA转换等-Guinness vhdl code routines, including water lights, digital, AD, DA conversion
liushuidengyouyi
- 此程序是用vhdl语言描写的流水灯程序，功能是流水灯左移-This procedure is used in light water vhdl language to describe the program, the function is left light water
Example8
- 一个基于FPGA的4位流水乘法器的小程序，设置了时钟输入，数据输入，并输出结果。-One of four water-based FPGA multiplier applet, set the clock input, data input and output.
picoblaze
- 基于Nexys3的picoblaze，实现了一个命令菜单，可以控制流水灯，VGA显示，交通灯。verilog，VHDL都有。-Based picoblaze Nexys3 achieve a command menu, you can control the water lights, VGA display, traffic lights. verilog, VHDL has.
led_water
- 这是一段流水等程序，利用verilog实现，可以实现四种模式转换。-This is a program, such as water use verilog implementation, can realize four kinds of mode conversion.
shumaguan_test
- 这是一段数码管测试程序，可以实现流水式数字显示，两种模式转换，适合初学者-This is a digital tube test program, can realize water type digital display, two kinds of mode conversion, suitable for beginners
zidong_led_water
- 用Verilog语言实现了将50MHz时钟分频到1Hz，实现了自动流水显示HELLO字母功能-Verilog language of the 50MHz clock frequency to 1Hz, realized the function of automatic water display HELLO letters
Johnson_counter
- 基于FPGA的Jhonson计数器，能用按键控制流水灯-FPGA-based Jhonson counter, can control buttons light water
yinliao_verilog
- 设计一个自动售货系统，卖soda水的，每份5分钱，只能投进三种1分、2分、5分硬币，要正确的找回钱数。用verilog编程，语法要符合FPGA设计的要求。-Design a vending system, selling soda water, 5 cents each, only dropped three kinds of 1 minute, 2 minutes, 5 coins, money back to the correct number. With verilog programm
quanzixongxiyiji-verilod
- 根据日常生活中的洗衣机使用流程设计状态。 空闲——加水——洗涤——排水——加水——清洗排水——甩干——报警 - according to the processes and the use of washing machine in the daily life of the design state. Idle-------- washing water drainage water------ alarm dry cleaning and drainage
run
- verilog HDL PARTAN 3E100的流水灯程序-verilog HDL PARTAN 3E100 water light program
run_flash_led
- 用verilog建立一个并行操作的流水灯模块。扫描频配置定为100 Hz，而每一个功能模块在特定的时间内，将输出拉高。-The establishment of a parallel operation of light water module verilog. Scanning frequency configured as 100 Hz, and each functional module within the specified time, the output high.
run_led
- Xilinx FPGA, ISE工程文件，Verilog语言实现流水灯，设计了分频器，可精确到点亮时间为一秒，可控制流水灯左右移位方向-Xilinx FPGA, ISE project file, Verilog language water lights, designed divider, accurate to one second light time, you can control the direction of light water left shift
cpu
- 用vhdl实现了具有流水的cpu，实现30条基于mips指令的指令集-Achieved with vhdl cpu with water, to achieve 30 mips instruction based instruction set
key_led
- 基于xilinxFPGA测试通过，按键消抖动，verilog编写，控制流水灯-Based xilinxFPGA test, the key jitter elimination, verilog prepared to control water lights
monitoringV5
- 文件的FPGA是基于Xilinx ISE写的，所用开发板为zedboard7020 484系列，完成的功能为：读取XADC里的温度，VCC，并存储到RAM中，通过流水灯实现翻看，读取等功能.-Document is based on Xilinx ISE FPGA wrote, the use of development board for zedboard7020 484 series, completed functions: reading XADC in temperature, VC