搜索资源列表
elecfans.com_quargfjc1105
- 学习FPGA仿真软件的书籍,QUARTUS中文教程手册,还是可以收藏一下的。-Books to learn FPGA emulation software, the the QUARTUS Chinese tutorial manual, or can be collected look.
ddsjiangjie
- 一篇关于用FPGA设计DDS的文章,个人觉得还是写得不错的,有着做这个的同学可以下载看看。-An article on the FPGA design of DDS, personally feel that is well written, has to do this students can download to see.
MyC2Board_RS232_Test
- 这是一个Altera FPGA NIOS II RS232通讯程序。 在Quartus II工程中,用Qsys建立了一个NIOS II为核心的CPU系统,并挂接了一个RS232接口。 在software目录下,有三个工程,一个是用C++类包装的RS232类的Eclipse工程,一个是不用C++类包装的Eclipse工程,还有一个是用VC++2008编写的RS232测试工程。 VC++2008编写的工程运行在PC机上,与FPGA中的NIOS II通讯。 这个实验的主要目的是编写一个
CY3686-Board-Design-Files
- 是驱动CY7C68013A的USB接口系统,可以应用于FPGA、DSP的开发-Driver the CY7C68013A' s USB interface system can be applied to the development of FPGA, DSP
DE2platform-introduction
- 基于FPGA的de2平台介绍,包括DE2开发板各部分的功能和简单应用。-Introduced, including the de2 platform based on FPGA the DE2 board functions and simple application.
ADSample_FPGA
- DSP和FPGA协同处理的ad采集程序,包括DSP和FPGA的代码,需要的请下载-DSP and FPGA co-processing of the ad collection procedures, including DSP and FPGA code, you need to download the
usb_test
- Cypress USB 的主从FPGA 控制实现代码-USB controller
lcd1602_driver
- 基于fpga的verilog程序,lcd1602控制器的总线写法,-lcd_control based on lcd1602
FPGA_CPU(Nios)TFT-LCD
- 网络论文,非常有用。 基于FPGA 及嵌入式CPU(NiosⅡ)的TFT-LCD 接口设计 本文介绍了一种基于FPGA 及NiosII 软核处理器与TFT-LCD 接口的方法。它直接采 用CPU 对存贮器的读写,实现了对TFT-LCD 屏的实时操作。它具有直接、有效和速度 快等特点。该设计使CPU 对TFT-LCD 的控制极其简单化-Network papers, very useful. Based on FPGA and embedded CPU (Nios Ⅱ) TFT-L
FPGAPPCI9054
- FPGA连接PCI9504的电路图。以及PCB文件-FPGA connected to the circuit diagram of the PCI9504. And PCB files
FPGA_PCI
- FPGA连接PCI9504的电路图。以及PCB文件-FPGA connected to the circuit diagram of the PCI9504. And PCB files
red-logic-Slave-FIFO_USB
- 红色飓风开发板程序 Slave FIFO_USB, cy68013加FPGA源码,完成USB通讯 -Red hurricane development board procedures the Slave FIFO_USB, cy68013 plus FPGA source code, complete USB communication
handover
- FPGA的异步时钟同步处理 从快时钟域到慢时钟域通用的握手信号-The FPGA asynchronous clock common handshake signal from a fast clock domain to a slow clock domain synchronization
RS232_PS2_Control
- Verilog语言编写的RS232控制模块以及RS232到PS2的通信接口模块。整个模块已经通过Virtex4的FPGA平台上的硬件仿真和验证。-Verilog HDL model for RS232 and PS2 interface communication control block. It includes the RS232 RX-TX model as well as PS2 model, and it have already been proven in FPGA virtex
LCD2VGA-ARMSYS2440PLINUX2.4
- LCD 2 VGA 模块说明书 杭州的一个公司的。引脚定义 用FPGA做的@-The LCD 2 VGA module manual of a company in Hangzhou. The pin definitions FPGA to do with the @
vga_lcd_latest.tar
- altera fpga platfor in vga and lcd controller
fPGA_LED
- FPGA开发板做的一个简单LED驱动,使用Verilog语言实现- This is an example of a simple 32 bit up-counter called simple_counter.v It has a single clock input and a 32-bit output port module simple_count(input clock , output end of module counter
clock
- 利用FPGA来编写程序实现24小时时钟显示-FPGA to program the 24-hour clock display
The-hardware-principle-diagram
- fpga嵌入式项目开发三位一体实战精讲的硬件原理图-hardware schematic fpga embedded project development trinity combat Jingjiang
szz
- verilog HDL 硬件描述语言 FPGA 数字钟的实现 调整时间 闹钟等功能-verilog HDL hardware descr iption language implementations of FPGA digital clock adjustment time alarm clock functions