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seven_seg
- 一个verilog代码，该代码很适合初学者熟悉FPGA的开发流程，主要功能为实现七段代码管的显示，主要针对xilinx公司spartan3系列的FPGA-a verilog code that are very suitable for beginners FPGA familiar with the development process, main function of the realization of the code in paragraph 107, xilinx against
FPGALCD
- FPGA控制LCD128*64程序，时序已仿真引脚锁定，并在硬件能够上实现汉字显示。-FPGA control LCD128* 64 procedures have been timing simulation, and hardware to achieve display of Chinese characters.
FPGA-multi-purpose-function-signal
- 基于FPGA的多功能函数信号发生器：基于FPGA实现直接数字频率合成，该函数信号发生器可以实现正弦波、三角波、方波、锯齿波等多种波形输出，输出信号的频率和幅度可调，利用单片机完成整个电路的时序控制、数据处理和实时显示输出。-Based on FPGA multi-purpose function signal generator: based on FPGA realizing direct digital frequency synthesis, this function signal ge
clock
- 利用FPGA来编写程序实现24小时时钟显示-FPGA to program the 24-hour clock display
danweishumaguan
- 用FPGA实现单位数码管显示，日期显示，前翻后翻，依次显示。-Units with FPGA digital display, date display, before the turn after turn, followed by display.
EDA
- 基于FPGA的抢答器源代码，能够同时显示4个人的分数，兼备记分牌的作用。-Answer FPGA-based source code that can simultaneously display four individual scores, both the role of the scoreboard.
Taximeter
- 出租车计价器（其中包括分频模块，计程模块，计时模块，计费模块，显示模块以及顶层模块），基于Verilog HDL语言，开发板是FPGA(Sparten 6 LXS45),开发环境是Xilinx。-Taxi meter (including frequency module, the meter module, timing module, billing module, display module and top-level module), based on Verilog HDL lang
Frequency-meter
- 本代码包含stm32单片机与FPGA两部分，通过FPGA实现频率、时间间隔以及相位差的测量并通过spi与stm32通信，在stm32上实现数据的运算与显示。-This code contains two parts stm32 MCU and FPGA, frequency, time interval and phase measurements and by spi communication with stm32, on stm32 achieve computing and displa
lcd1602
- FPGA控制lcd1602液晶显示，使用Verilog语言在quartus II环境下开发-FPGA lcd1602 verilog