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通用SDRAM编程核心资料代码
- 通用于FPGA控制SDRAM编程核心资料代码，给出了验证实用的 Velogic代码。有很高的实用价值！
canbus
- 实现CAN总线的通信，并通过测试验证，用verilog在FPGA上实现-CAN bus communication, and tested to verify that, in the FPGA using verilog
CYCLONE2FPGAsch
- 已经验证过的FPGA开发板原理图，想自己设计开发板的可以参考-Has been verified FPGA development board schematics, design and development to its own board can refer to TI
ep2c35_5_3_ps2_keyboard_test
- 利用fpga来与键盘通信，ps/2协议，代码简洁可靠，实验验证可行-Use fpga to communicate with the keyboard, ps/2 protocol, code is simple and reliable experimental verification possible
RS232_PS2_Control
- Verilog语言编写的RS232控制模块以及RS232到PS2的通信接口模块。整个模块已经通过Virtex4的FPGA平台上的硬件仿真和验证。-Verilog HDL model for RS232 and PS2 interface communication control block. It includes the RS232 RX-TX model as well as PS2 model, and it have already been proven in FPGA virtex
buttons-
- 包括按键控制板原理图、FPGA硬件程序、FPGA内部CPU的软件程序，该板已经过工程验证。-Including the control panel buttons schematics, FPGA hardware program, FPGA internal CPU software program, the board has been engineering verification.
down
- FPGA的音频上位机下载程序，已经验证过了-FPGA-PC audio download programs, has already been verified
FFT
- FPGA下用VHDL实现的基2 cooley-tukey的8位FFT算法，在quartus ii环境下验证成功。-Under FPGA with base 2 cooley-tukey of 8 FFT algorithm VHDL realize, in quartus ii environment successfully verified.
decode_JPEG
- 使用高级并行化硬件语言Handel-C实现的JPEG标准图像解压缩功能，可在Altera FPGA 验证通过。-Use Advanced JPEG standard image parallelized hardware solution Handel-C language to achieve compression function can be verified by the Altera FPGA.