VGA Component for Altera SOPC Builder on DE2

Verilog and SOPC implementation of interrupts for DE2 board and Cyclone -Verilog and SOPC implementation of interrupts for DE2 board and Cyclone II

基于SOPC的串口通讯实验，在DE2开发板上运行通过。芯片为EP2C35F672C6-SOPC-based serial communication experiment, run by the DE2 board. Chip for EP2C35F672C6

基于SOPC的定时器实验，包含整个工程，包括硬件板级调试和C代码，在DE2开发板上运行通过。使用芯片为EP2C35F672C6-SOPC-based timer experiments, contains the entire project, including hardware board-level debugging and C code, and run through in the DE2 board. Chip for EP2C35F672C6