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Freq
- 简易数字频率计，用Verilog HDL编写的，基于Quartus II实现，结构清晰，功能较为全面，能满足简单的频率测量要求
equal_precision_cymometer
- 采用等精度测频原理的频率计的程序与仿真,用verilog语言实现,可以仿真综合得到所想时序!
f_meter
- Verilog频率计,可以测出1~9999hz的频率，分模块做成顶层文件-Verilog frequency meter can measure 1 ~ 9999hz frequency, sub-module is made of top-level files
verilog_c
- 采用Verilong编写的等精度频率计，调试成功可测频率、周期、占空比、正负脉宽。-Written using Verilog and other precision frequency meter, debugging success can be measured frequency, period, duty cycle, positive and negative pulse widths.