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FPGA_test_frequency
- 本原码是基于Verilog HDL语言的FPGA原程序，主要用于测频率，特点主要是可以更快地测频。实时性更高。-primitive code is based on Verilog HDL FPGA original program, mainly for the measurement frequency, the main features can be faster frequency measurement. Real-time higher.
Freq
- 简易数字频率计，用Verilog HDL编写的，基于Quartus II实现，结构清晰，功能较为全面，能满足简单的频率测量要求
equal_precision_cymometer
- 采用等精度测频原理的频率计的程序与仿真,用verilog语言实现,可以仿真综合得到所想时序!
f_meter
- Verilog频率计,可以测出1~9999hz的频率，分模块做成顶层文件-Verilog frequency meter can measure 1 ~ 9999hz frequency, sub-module is made of top-level files
Frequency
- 通过单片机和CPLD实现对输入信号的频率计数，单片机采用Ｃ语言，CPLD采用verilog语言。-MCU and CPLD count the frequency of the input signal, the microcontroller using the C language, CPLD verilog language.
sen_ADF4350
- ADI公司ADF4350频率源芯片的verilog程序源代码，之前做过一个项目中的一部分，现在把代码拿来与大家分享-ADI' s ADF4350 frequency source chip verilog source code, done before a project part, and now the code is used to share with everyone
verilog_c
- 采用Verilong编写的等精度频率计，调试成功可测频率、周期、占空比、正负脉宽。-Written using Verilog and other precision frequency meter, debugging success can be measured frequency, period, duty cycle, positive and negative pulse widths.