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3下载：
h.264(verilog HDL)
这是基于流水线结构的H.264解码器源码-h.264 (verilog HDL) which is based on the pipeline structure of the H.264 decoder source code
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eDP接口TFT-LCD显示驱动原码（verilog+c）-eDP Interface TFT-LCD display driver source code (verilog+c)
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xilinx 基于查找表方法实现的IDCT的verilog源码-Xilinx LUT-based method to achieve the IDCT of the Verilog source code
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通过Verilog程序在FPGA上实现按键切换的亮度变化。包含源代码和原理图-Verilog program achieved through changes in brightness button to switch on the FPGA. Contains the source code and schematics
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verilog写的图像旋转代码，测试通过-verilog rotation source code
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产生逻辑画面的R/G/B/黑/白等画面的完整verilog源码，通过修改宏定义方便修改成支持各种尺寸的LCD驱动，本源码为RGB格式输出接口-Complete verilog source code generation logic screen R/G/B/black/white screen, etc., by modifying the macro definition modified to support a variety of convenient size LCD driver,
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