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xapp208
- xilinx 基于查找表方法实现的IDCT的verilog源码
zynq_base_trd_14_3
- xilinx的视频处理参考Verilog代码-Video Targeted Reference Design On Xilinx FPGA With Verilog
JPEG-Encoder
- JPEG 编码器的verilog实现，已经在XILINX SPARTAN6上实现并验证。-The JPEG encoder verilog implementation has been implemented in a Xilinx SPARTAN6 and verify.
xapp208
- xilinx 基于查找表方法实现的IDCT的verilog源码-Xilinx LUT-based method to achieve the IDCT of the Verilog source code
dct2d
- 研究生课程 ： 来源于Xilinx公司，二维DCT变换代码。-Graduate courses: from Xilinx, 2D DCT function implementation verilog code.