H.264解码器，用verilog写成，可以在FPGA上实现baseline的264解码-H.264 decoder, written with verilog, can be achieved in the FPGA on the baseline of 264 decoding

H.264解码的源代码，详细介绍各个模块的功能和组成部分。-H.264 decoder source code, and details the function of each module and part.