2D-DCT, 二维离散余弦变换模型。能够通过Synplify DSP生成Verilog代码 -2D-DCT model. This simulink model can generate RTL code via Synplify DSP.

实现图像的滤波，使用VERILOG语言，自己是在FPGA中实现的，其他的也可参考(To achieve image filtering, the use of VERILOG language, and they are implemented in FPGA, the other can also refer to)