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pinlvji
- 多功能函数信号发生器，频率计，可产生三角波，方波，正炫波，锯此波，且波形幅度和频率可步进调节，最高频率可达40MHz-Multi-function signal generator, frequency counter, can generate the triangular wave, square wave, is hyun waves, saw this wave, and wave amplitude and frequency adjustment can be stepper, th
Frequency_tahir_uet
- This the sorce code in Visual Basic 6 for the Frequency counter.-This is the sorce code in Visual Basic 6 for the Frequency counter.
7778
- USB接口虚拟仪器之频率计 -USB port of the frequency meter virtual instrument Virtual Instruments USB port of the frequency counter
EEMD
- hilbert-huang 变换中EMD(经验模态分解)方法对非线性信号的分析，固定模态分量及瞬时频率计算-hilbert-huang transform EMD (Empirical Mode Decomposition) method of nonlinear signal analysis, the fixed component and the instantaneous modal frequency counter Operator
frq
- Frequency Counter Return array elements and the frequency of each element in the array. Author: Ibraheem-Frequency Counter Return array elements and the frequency of each element in the array. Author: Ibraheem
frequency-counter
- 这是用verilog写的配合DE2 FPGA开发板的10进制显示频率计的工程文件夹的压缩包，解压后可直接下载到DE2板上，其中频率输入端是系统自带27M时钟D13用于测试，如果想要应用于别的开发板，可以重新分配引脚。-DE2 FPGA development board with with verilog write with decimal display frequency meter project folder compression package, after decompressi
ADC
- AD转换的Matlab程序，将输入电压转换成时间(脉冲宽度信号)或频率(脉冲频率)，然后由定时器/计数器获得数字值-AD conversion of the Matlab program, the input voltage is converted into a time (pulse width signal) or a frequency (pulse frequency), and then to obtain a digital value by the timer/counter
sine
- 正弦信号发生器的设计,正弦信号发生器的结构由3 部分组成。数据计数器或地址发生器、数据ROM 和D/A。性能良好的正弦信号发生器的设计要求此3 部分具有高速性能，且数据ROM 在高速条件下，占用最少的逻辑资源，设计流程最便捷，波形数据获最方便。下图是此信号发生器结构图，顶层文件SINGT.VHD 在FPGA 中实现，包含2 个部分：ROM 的地址信号发生器，由5 位计数器担任，和正弦数据ROM，拒此，ROM由LPM_ROM模块构成能达到最优设计，LPM_ROM底层是FPGA中的EAB或ESB等。
Frequency-measurement
- The block uses a counter to count the number of cycles per second and then finds the frequency from the count.