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4下载:
基于FPGA的can 总线设计,采用verilog语言编写。在FPGA的开发环境下,新建一个工程,然后将本文件中的各个源代码添加进工程里,即可运行仿真。-FPGA-based bus design can use verilog language. FPGA development environment, a new project, and then the paper all the source code to add the project, Simulation can be run
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verilog语言实在点变换DFT源代码,可以配合软核或者其他CPU进行综合FFT变换,也可以单独使用生成module!-verilog language is point FFT transform source code, can tie in with the soft-core CPU, or other integrated FFT transform, it can be used to generate module!
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Compression ZingZang RTL Verilog source code
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完整的JPEG解压缩代码,使用verilog编写的源程序-Complete JPEG decompression code,Prepared using verilog source
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1024点FFT的verilog语言实现的源程序的代码-1024 fft verilog language workout source program code
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一个CIC滤波器的源代码,基于verilog HDL语言(The source code of a CIC filter is based on Verilog HDL language.)
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数字滤波器的MATLAB与FPGA实现——杜勇(配套光盘) 程序源码,配合电子书使用可以很好的学习数字滤波器的MATLAB与FPGA实现,完整代码,仿真良好,第5、6、7章((MATLAB and FPGA implementation of digital filter -- Du Yong (supporting CD-ROM) program source code, can learn matlab and FPGA implementation of digital filter we
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2下载:
数字滤波器的MATLAB与FPGA实现——杜勇(配套光盘) 程序源码,配合电子书使用可以很好的学习数字滤波器的MATLAB与FPGA实现,完整代码,仿真良好,第9章((MATLAB and FPGA implementation of digital filter -- Du Yong (supporting CD-ROM) program source code, can learn matlab and FPGA implementation of digital filter well w
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