搜索资源列表
usb(FPGA)
- 基于FPGA的usb程序，采用VHDL语言编写。 开发环境为ISE或者MAXPLUS2。-FPGA-based usb procedures, using VHDL language. Development Environment for the ISE or MAXPLUS2.
4mult
- 可用的4位乘法器，用VHDL在FPGA中实现-available four multipliers, FPGA VHDL in achieving
rs_encoder
- 一个很不错RS编码，用于DVB的信道编码，用VHDL语言编写，在FPGA上通过验证。
dynamic_co-operation_cordic_fpga
- 一篇关于使用cordic实现动态配置以提高FPGA的整体性能的高效算法具体详解，很实用哦-On the use of CORDIC realization of a dynamic configuration to improve the overall performance of FPGA-specific high-performance algorithms explain, it is practical Oh
FFT(VHDL)
- 数字信号处理fft算法计算，用fpga开发，vhdl语言写成-Digital signal processing fft algorithm using FPGA development, vhdl language
cnv_encd
- 程序来自《现代通信系统－使用matlab》英文版 已经调通！并加上了注释。 希望对大家有帮助1-fpga
bin2deci
- 程序来自《现代通信系统－使用matlab》英文版 已经调通！并加上了注释。 希望对大家有帮助4-fpga
89346497fpga-example2
- 于毕业设计与论文以及做课题用-MSK Simulink simulation program for the design and graduation thesis topic, and making use -Design and graduation thesis, as well as issues to do with-MSK Simulink simulation program -于毕业设计与论文以及做课题用-MSK Simulink simulation program for
MQdecoder
- Verilog HDL 实现的JPEG200的MQ解码-JPEG2000 MQ DECODER BASED ON FPGA， Verilog HDL
Rocket
- 很好的高速口的设计资料，很好的高速口的设计资料 很好的高速口的设计资料-In design of large-scale access convergence router(hereafter referred to ACR) forwarding engine, the Xilinx Virtex-4 FPGA!s RocketI/O r multi-gigabit transceiver is used to satisfy the need of high speed and st
l602display
- 1602显示单片机与FPGA的通信！实现数字钟的功能！仅供参考！望大家多多指教-desplay1602
divider
- 流水型除法器，经过FPGA平台验证。宽度可以任意修改，提供计算完毕信号。-Water-type divider, after a FPGA platform validation. Width can be modified to provide the calculation is completed the signal.
JPEG-LS
- 基于改进JPEG-LS算法的遥感图像近无损压缩专利，由航天五院508所申报，很详细的介绍了算法和fpga的实现-Improved JPEG-LS algorithm near lossless compression patent, the space the five branches of 508 reporting, a detailed explanation of the algorithm and implementation fpga
cordic
- cordic算法的VHDL实现，在FPGA下应用-cordic VHDL algorithm implemented in the FPGA application under
Huffmann-Coding-FPGA
- huffman coding in vhdl or verilog with explanation
33682546-Imlementation-of-ANN-on-FPGA
- Implementation of Artificial Neural Networks on FPGA (in VHDL)
xiaosong-fpga
- FIR数字滤波，亲自测试，都是源码，希望可以帮到大家，谢谢，谢谢！大家要好好学习呀，学习好VHDL(FIR digital filter, personally tested, are source code, and I hope to help you, thank you, thank you! We should study hard, good study, VHDL)
SV
- 基于dspbuilder的svpwm仿真，可以直接转化为VHDL程序，加载到FPGA中使用(SVPWM simulation based on dspbuilder, can be directly converted to VHDL program, loaded into the use of FPGA)