搜索资源列表
canbus(FPGA)
- 基于FPGA的can 总线设计，采用verilog语言编写。在FPGA的开发环境下，新建一个工程，然后将本文件中的各个源代码添加进工程里，即可运行仿真。-FPGA-based bus design can use verilog language. FPGA development environment, a new project, and then the paper all the source code to add the project, Simulation can be run
vpr
- 用c＋＋写的用于FPGA设计中布图布线的工具源码，有几万行程序，包含文档-using c + + to write for FPGA design the layout of the wiring tools source, there are tens of thousands of procedure, the document contains
fpga_matlab
- 用matlab建立模型设计fpga，文章采用系统模型-Using matlab to establish model design fpga, articles used system model
FIR
- 浮点fir设计工具，可与FPGA设计工具无缝连接开发-Fir floating-point design tools, FPGA design tools with the development of seamless connectivity
Matlabsimulink_FPGA
- Matlabsimulink 在FPGA 设计中的应用-Matlabsimulink in the FPGA Design
xiaocihuiliang
- 小词汇量语音识别比较好的毕业设计论文，《小词汇量非特定人孤立词语音识别的FPGA实现 》《小词汇量汉语孤立词语音识别的理论与技术研究》，NH文件格式，是中国知网上的论文。-Small vocabulary speech recognition comparison best graduate design thesis, " non-specific small-vocabulary isolated word speech recognition people of the FPGA
89346497fpga-example2
- 于毕业设计与论文以及做课题用-MSK Simulink simulation program for the design and graduation thesis topic, and making use -Design and graduation thesis, as well as issues to do with-MSK Simulink simulation program -于毕业设计与论文以及做课题用-MSK Simulink simulation program for
Matlab_FPGA
- 在Matlab中实现数字通信FPGA硬件设计-In Matlab in digital communications hardware design FPGA
filter
- 这是基于MATLAB下的XILINX的FPGA的FIR滤波器的模型设计文件-This is a MATLAB-based FPGA of the XILINX Model of the FIR filter design documents
Rocket
- 很好的高速口的设计资料，很好的高速口的设计资料 很好的高速口的设计资料-In design of large-scale access convergence router(hereafter referred to ACR) forwarding engine, the Xilinx Virtex-4 FPGA!s RocketI/O r multi-gigabit transceiver is used to satisfy the need of high speed and st
MatlabFIRFPGA
- 这是篇关于matlab环境下的数字滤波器的论文，基于Matlab的FIR滤波器设计及FPGA实现-This is a chapter on the environment matlab digital filter paper, based on Matlab for FIR filter design and FPGA implementation
crc16
- CRC16模块，用于SD卡驱动设计。经过FPGA及IC平台验证。-CRC16 module for SD card-driven design. Through the FPGA and IC platform for verification.
XilinxFPGADesign1.1
- learn how to use Xilinx FPGA design in ten minutes
FPGA
- The FPGA interface design
FPGAol
- FPGA通用高速串行互连协议设计FPGA Design of universal high-speed serial interconnect protocol-FPGA Design of universal high-speed serial interconnect protocol
wireless
- 无线通信FPGA设计Matlab Verilog代码-Wireless FPGA design Matlab Verilog code
xy7z.ZIP
- 基于USB单片机和FPGA的信号源设计Single chip microcomputer based on USB and FPGA signal source design-Single chip microcomputer based on USB and FPGA signal source design
fpga-jpeg
- JPEG硬件解码器设计 verilog实现-JPEG hardware decoder design verilog implementation
FPGA
- 计算机图形图象学中基于FPGA的铅笔画绘制算法结构设计及优化-Studies in computer graphics image of the pencil drawing based algorithm for FPGA Design and Optimization
pll_dq
- 基于DQ旋转坐标，Uq=0,实现了三相锁相环,对DSP，FPGA的设计具有指导意义-DQ rotating coordinate-based, Uq = 0, to achieve a three-phase locked loop, for DSP, FPGA design instructive