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divider
- 流水型除法器,经过FPGA平台验证。宽度可以任意修改,提供计算完毕信号。-Water-type divider, after a FPGA platform validation. Width can be modified to provide the calculation is completed the signal.
divider
- 16位定点无符号数除法器,除数、被除数均由16位整数和16位小数组成,商由32位整数和16位小数构成,余数由32位小数组成-Unsigned 16-bit fixed-point divider, divisor, dividend by 16-bit integer and 16 fractional bits, commercial 32-bit integer and 16 by the decimal form, the remainder from 32 fractional bits