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learn_RS_coding
- 自己根据网上已有程序改写的(127,115)RS编码，有详细的注释及对FPGA实现算法的改写(参考try123.m)，希望可以让大家少走弯路-(127,115) rs encoder/decorder with detailed annotations.
wierlesscommunicationfpgadesignmatlabverilogcode.r
- 无线通信FPGA设计的所有源码，具有良好的使用价值-verilog matlab ISE
wireless
- 无线通信FPGA设计Matlab Verilog代码-Wireless FPGA design Matlab Verilog code
ADPLL
- This paper presents the ADPLL design using Verilog and its implementation on FPGA. ADPLL is designed using Verilog HDL. Xilinx ISE 12.1 Simulator is used for simulating Verilog Code. This paper gives details of the basic blocks of an ADPLL. In this p
源码 基于XILINX FPGA的ofdm通信系统基带设计
- verilog 源码 基于XILINX FPGA的ofdm通信系统基带设计(Experiment of digital signal processing: parallel filtering experiment code. I hope it will help.)
数字滤波器的MATLAB与FPGA实现例程代码567
- 数字滤波器的MATLAB与FPGA实现——杜勇(配套光盘) 程序源码，配合电子书使用可以很好的学习数字滤波器的MATLAB与FPGA实现，完整代码，仿真良好，第5、6、7章((MATLAB and FPGA implementation of digital filter -- Du Yong (supporting CD-ROM) program source code, can learn matlab and FPGA implementation of digital filter we
Chapter_9
- 数字滤波器的MATLAB与FPGA实现——杜勇(配套光盘) 程序源码，配合电子书使用可以很好的学习数字滤波器的MATLAB与FPGA实现，完整代码，仿真良好，第9章((MATLAB and FPGA implementation of digital filter -- Du Yong (supporting CD-ROM) program source code, can learn matlab and FPGA implementation of digital filter well w