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13lab03
- 一组开发基于XILINX FPGA开发DSP算法的应用资料，具有实用性，可操作性。（3）-a group Xilinx FPGA-based DSP algorithm development of the information is useful, operability. (3)
filter
- 这是基于MATLAB下的XILINX的FPGA的FIR滤波器的模型设计文件-This is a MATLAB-based FPGA of the XILINX Model of the FIR filter design documents
arithmetic
- 这是xilinx的FPGA实现各种算数运算的全部基于MATLAB的模型文件，包括加减乘除等-This is the xilinx arithmetic FPGA to achieve the full range of MATLAB-based model of documents, including multiplication and division, such as addition and subtraction
Rocket
- 很好的高速口的设计资料，很好的高速口的设计资料 很好的高速口的设计资料-In design of large-scale access convergence router(hereafter referred to ACR) forwarding engine, the Xilinx Virtex-4 FPGA!s RocketI/O r multi-gigabit transceiver is used to satisfy the need of high speed and st
DDS
- 直接数字合成(DSS)的matlab仿真,采用simulink和Xilinx的system generator工具开发-simulink for DSS, the development tool is the system generator by Xilinx and simulink
ADPLL
- This paper presents the ADPLL design using Verilog and its implementation on FPGA. ADPLL is designed using Verilog HDL. Xilinx ISE 12.1 Simulator is used for simulating Verilog Code. This paper gives details of the basic blocks of an ADPLL. In this p
impo_these_FPGA_SAPTONO_DEBYO_00_00
- this document is a thesis discuss about fpga implementation of signal processing system on targets such as altera and xilinx
WARP
- The Wireless Open-Access Research Platform (WARP) is a scalable and extensible programmable wireless platform, built the ground up to prototype advanced wireless networks. WARP combines high-performance programmable hardware with an open-source repos