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mimo检测算法的FPGA实现，包括最小迫零检测算法和ML检测算法，已在ISE上仿真通过-mimo detection algorithm for FPGA implementation, including the smallest zero forcing detection algorithm and ML detection algorithm has been simulated by ISE on
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2048点FFT的FPGA实现，同时支持更高的点数计算-2048-point FFT in FPGA implementation, while supporting a higher number of points calculated
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用FPGA实现IIC通信，功能为从EEPROM中写和读几个数字，使用IIC通信实现-Implementation of IIC communication with the FPGA, to write and read a few numbers the EEPROM, to achieve the use of IIC communication
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I HAVE UPLOADED A DESIGN WITH THE IMPLEMENTATION OF DIGITAL CLOCK WITH INCREMENT AND DECREMENT BUTTON BASED ON FPGA(ARTIX-7) BOARD-I HAVE UPLOADED A DESIGN WITH THE IMPLEMENTATION OF DIGITAL CLOCK WITH INCREMENT AND DECREMENT BUTTON BASED ON FPGA(ART
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高速串口FPGA实现 已在产品上应用，使用FPGA开发(High speed serial FPGA implementation has been applied in the product)
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