搜索资源列表
manchester
- 用verilog HDL实现曼彻斯特编码的源码-with Manchester Verilog HDL source code
RS encoder(Verilog)
- RS编码的源代码使用Verilog在Xinloinx平台-RS coding using the source code in Verilog Xinloinx platform
Asynchronous_slavefifo_wr.rar
- usb-cy7c68013异步写传输代码verilog,usb-cy7c68013 asynchronous transfer write verilog code
reed
- this the completedocumentation and code about reed solomon logic implemented on fpga in verilog.-this is the completedocumentation and code about reed solomon logic implemented on fpga in verilog.
Verilog
- 全加器的Verilog 实现代码 寄存器的Verilog 实现代码-Low-pass filter integral part of full-adder and register the Verilog implementation code
sigmadelta_verilog_code
- sigma delta verilog code and testbench for you to do simulation
FPGA
- 《无线通信FPGA设计》一书中例子的Matlab及verilog代码-" Wireless FPGA Design" a book example of Matlab and the verilog code
setbox_Vcode
- 某机顶盒的Verilog源码,包括文档和代码，可用-the Verilog code and doc of setbox
3bit_adder
- Verilog source code for a 3bit full adder build with modules using predefined nand gates.
LIB5001_CW_8b10b_dec
- CW 8b10b Verilog source decoder code
fsm1
- 序列检测代码verilog 包括tb，已经验证ok-Sequence detection code verilog tb, have verified ok
aaa2
- 饮料自动售卖机，售4种不同价格的饮料，verilog代码-Beverage vending machines, sold four different price drinks verilog code
newViterbi217
- 基于IEEE802.11n标准,采用verilog语言设计的(2,1,7)卷积码viterbi译码器,支持1/2,2/3,3/4,5/6四种码率的译码,以测试无误-IEEE802.11n standard Verilog language design (2,1,7) convolutional code viterbi decoder support 1/2, 2/3, 3/4, 5/6 four bit rate decoding to test and correct
Ver_I2C_eeprom
- 用verilog编写的I2C——E2PROM模型。适用于各种型号的E2PROM，代码内部有参数可选。-Written in verilog I2C- E2PROM model. E2PROM, the internal code applicable to various types of optional parameters.
cordic
- it is a code to implement cordic algorithm in verilog. it calculates sin and cosine of an input angle.
BREATH_LED
- 呼吸灯代码，非常的实用啊，verilog代码，可以很炫的指示系统运行-Breathing light code, very practical, Verilog code, can be a shining instructs the system to run
shifter
- VErilog code for the 8 bit shifter
WinRAR
- this a verilog code for traffic control in a traffic bursty city.-this is a verilog code for traffic control in a traffic bursty city.
traffic-light-Verilog
- 交通灯分为X组和Y组，每组包括了2位倒计时数码管和红黄绿三色LED信号灯（每组包括﹢、-两小组，显示内容一样），考虑到应用需求，要求芯片可通过I2C接口连接到上位机，以调节内部控制寄存器,此为Verilog代码，包含led、seg、timer等模块。-Traffic lights are divided into groups X and Y groups, each including two digital countdown yellow-green and red LED lights
LFSRTestbench
- java applet for dveleoping verilog code for lfsr