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Viterbi_in_TMS320C54x_Family_code
- Viterbi Decoding Techniques in the TMS320C54x Family code 即是TMS320C54x实现VIterbi译码,是C与汇编混合编程,相信学习通信的又要用DSP来实现的人,一定会惊喜的
veterbi416
- 实现(4,1,6)卷积码的维特比译码源程序,采用了最大似然算法-The realization of (4,1,6) convolutional code Viterbi source using the maximum likelihood algorithm
turbo_tcq.tar
- 基于Turbo码的网格编码调制的c代码,包括了VQ,TCQ、TCVQ、SQ以及维特比算法等,内容非常全面,不过要在linux平台上运行。-Turbo codes based on trellis coded modulation c code, including the VQ, TCQ, TCVQ, SQ and the Viterbi algorithm, the content is very comprehensive, but in linux platform.
juanjima
- 卷积码编译码的matlab实现,采用类维特比译码方法-Convolutional code encoding and decoding of the matlab implementation, using class Viterbi Decoding Method
newViterbi217
- 基于IEEE802.11n标准,采用verilog语言设计的(2,1,7)卷积码viterbi译码器,支持1/2,2/3,3/4,5/6四种码率的译码,以测试无误-IEEE802.11n standard Verilog language design (2,1,7) convolutional code viterbi decoder support 1/2, 2/3, 3/4, 5/6 four bit rate decoding to test and correct
viterbi
- 采用(2,1,8)卷积码编码,采用viterbi译码算法进行解码(2,1,8 convolutional code is used, and Viterbi decoding algorithm is used to decode)