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95108325
- 通过CPLD实现串行通信之VHDL语言，好看易懂-through CPLD serial communications VHDL, pretty easy to understand
AD7982
- DSP并行读取串行接口A/D芯片的VHDL接口程序,VHDL Interface Program between DSP (parrel interface) and AD7982 (Serial interface)
readme_vhd
- VHDL串并转换源程序，可以实现信号在串行和并行间的转换。-SERDES VHDL source code, you can achieve signal at between serial and parallel conversion.
decoder
- 并行数据向串行数据的转换，实现并到串之间的随意变换-parelell to seriel
ser_par
- 24bitAD数据采样进行串并转换，并行输出。另包括24位DA并串转换，串行输出。-24bitAD data sampling and converted to strings, parallel output. Other notable features include 24-bit DA and string conversion, serial output.
FIRFIR1
- 基于FPGA的FIR串行滤波器设计与实现，本文运用VHDL编写-FPGA-based FIR filter design and implementation of the serial, the paper prepared by the use of VHDL
ADS7822
- 基于VHDL语言的串行AD转换及SignalTap嵌入式逻辑分析仪应用-AD conversion and serial SignalTap embedded logic analyzer application based on VHDL language