16位有符号整数除法，将商并入移位后的被除数，节省资源。-16-bit signed integer division, will shift into business after the dividend, saving resources.

lattice isplever7竟然没有除法库,只好在网上找了老外写的vhdl除法器-lattice isplever7 Treasury did not divide, so the Internet to find a foreigner to write the VHDL divider

该pdf 详细介绍了 提高除法电路的方法。和设计出发电路时要注意的问题， 介绍了各种除法设计代码-Pdf details the divider circuit to improve the method. And design of the starting circuit should pay attention to the issue of when to introduce a variety of design code division