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CPU_design
- 一个简单指令的cpu设计。 可以实现4个指令的的运算。-a simple instructions cpu design. 4 can be achieved directive arithmetic.
sdcc-src-2.6.0.tar
- sdcc是为51等小型嵌入式cpu设计的c语言编译器支持数种不同类型的cpu-sdcc to 51 other small-scale embedded cpu design c compiler supports several different types of c pu
键盘设计
- 1，消除按键的抖动问题 因为按键在闭合或断开过程中出现一段抖动期，主要由于按键的不稳定性引起的，这时会呈现一串页脉冲，时间的长短和开关的机械特性有关。一般在5ms~10ms之间。为保证CPU对键的一次闭合作一次处理，必须去抖动。在键的稳定闭合或断开时读键的状态。 2，据EICE51原理图编写并调试一个键输入子程序，其功能为判断键盘上有无键输入，若有键入，作去抖动处理后，计算输入键的键号送累加器A。-eliminate jitter button issues as keys or disconn
vc2
- 这是一个在C环境下编写的操作系统课程设计 包含了内存管理 CPU管理 文件管理 设备管理-This is an environment in C curriculum design to prepare the operating system includes a memory management CPU Management Document Management Equipment Management
wenducaiji
- 微机原理课程设计报告 从设计到流程图 到代码 以8088CPU 为核心设计一个温度采集系统，系统可以实现一路温度的采集，在3位LED显示器上显示当前温度。-Computer Principles of curriculum design from design to report to the code flow chart to design a 8088CPU as the core temperature acquisition system, the system temperature
CPUcoa-course-design
- 简单的cpu设计，包括memory，alu运算器，comp比较器以及控制器control，寄存器register等的vhdl编写的程序。-A simple cpu design, including memory, alu arithmetic logic unit, comp comparator and controller control, such as vhdl register register write programs.
access_hardware
- 实例演示了DELPHI 检测计算机硬件如：cpu，内存，磁盘，光盘，显示器模式、端口、电池，鼠标等的方法，源码设计比较详尽。-DELPHI examples demonstrate the detection of computer hardware, such as: cpu, memory, disk, CD, display mode, port, battery, mouse, and other methods, a more detailed source design.
yuanma
- MIPS指令源代码，用于CPU设计，计算机组成原理课设所需要的源代码下载-MIPS instruction source code for the CPU design, computer composition principle lesson to set the source code download
mips-cpu
- 一个组成原理的课程设计，完成一个流水线MIPS CPU的设计，有详细的说明及其代码，实测可用-a project about the design of MIPS CPU
cpu-leon3-altera-ep1c20
- CPU性能仿真测试软件，对于VHDL设计的芯片可以做新能测试-CPU VHDL
LeonardoSpectrum_V2005a[1].82key
- CPU设计仿真测试软件，没有汉化版，都是英文版的，对设计的ＣＰＵ可以进行性能防止-cpu leon software
pipelined-CPU
- 流水线CPU的设计，计算机组成原理与系统结构的实验做的-The design of the pipelined CPU
MIPS
- 基于32位字长的MIPS cpu设计的代码实现,包括指令和寄存器数据-Based on a 32-bit word length MIPS cpu design code, including instructions and register data
16-CISC-CPU-design
- 16位精简指令集的CPU设计，有完整的步骤和原程序可供学习-16-bit RISC CPU design, complete steps and the original program for learning
Chapter-13
- 13.2 RISC-CPU设计 13.3 RISC-CPU Testbench设计-13.2 RISC-CPU design 13.3 RISC-CPU Testbench Design
CPU
- 设计一段程序来模拟优先级调度算法和时间片轮转算法。可以指定进程的数量、各进程需要CPU的时间和各进程的优先级。-Design a program to simulate the priority scheduling algorithm and the time slice rotation algorithm. You can specify the process of quantity, the process requires CPU time and the process prior
code
- Mips单周期CPU设计（支持7条指令addu、subu、ori、lw、sw、beq、lui）-Mips single-cycle CPU design
RISC_CPU1
- 讲述了简易cpu设计的全部过程，代码详细，对于一个初学者是很好的范本-About the whole process, the simple design of CPU code, for beginners is a very good model]
singleTcpu
- 单周期cpu设计，基于xilinx ISE环境设计，使用MIPS语言-Single cycle, the CPU is designed, based on xilinx ISE environment design, the use of MIPS language
eetop.cn_RISC32 VHDL
- 根据vhdl设计的32位CPU具备加减 读写等标准功能(a 32-bit cpu based on VHDL designed with function of fundamental function of subtraction , addition, load and store .)