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rs-codec-8-4
- encode.v The encoder syndrome.v Syndrome generator in decoder berlekamp.v Berlekamp algorithm in decoder chien-search.v Chien search and Forney algorithm in decoder decode.v The top module of the decoder inverse.v Computes multiplic
speech
- 用verilog HDL实现自相关算法！ RTL级可综合代码！ 通过modelsim5.6仿真和quartusii7.1综合！-Verilog HDL using auto-correlation algorithm to achieve! RTL-level code can be integrated! Through simulation and modelsim5.6 integrated quartusii7.1!
verilog-for-AES-algorithm
- 介绍了verilog HDL语言对AES算法进行数据加解密。-Introduced the verilog HDL language to AES algorithm for data encryption and decryption.
adder
- 这是一个最简单的四位的全加器设计，由两个半加器构成，采用的是VERILOG的算法级和门级描述的。-This is one of the easiest of the four full adder design, consists of two half-adder, the VERILOG algorithm-level and gate-level descr iptions.
cf_cordic_latest.tar
- CORDIC算法 Verilog代码 支持8位、16位和32位-CORDIC Algorithm Verilog code
FPGA-implementation-of-dsp
- 《数字信号处理的FPGA实现》一书的源代码，包括verilog和VHDL版本。该书是算法的硬件实现的权威书籍。-" FPGA digital signal processing," a book of the source code, including verilog and VHDL versions. The book is the definitive book on the algorithm for hardware implementation.
code
- 用Verilog写的采用LSM算法的自适应性FIR滤波器，有testbench和主体代码，亲测可用-Written using Verilog LSM algorithm using adaptive FIR filters, and the body has testbench code, pro-test available
CORDIC
- 基于FPGA的实现CORDIC算法的实现，本算法是Verilog语言编写的-FPGA implementations achieve CORDIC algorithm, the algorithm is the Verilog language
digital-equalizer-Verilog
- 硕士论文。主要包括：1、均衡器的设计原理 2、码间串扰与均衡原理 3、自适应均衡算法，主要介绍迫零算法、LMS算法、RLS算法 4、LMS自适应均衡器的Verilog设计 5、以上算法的matlab仿真-Master thesis. The main contents are as follows: 1, the design principle of the equalizer 2, intersymbol interference (ISI) and equilibrium principl